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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳少傑(Sao-Jie Chen) | |
dc.contributor.author | Hsin-Yi Tu | en |
dc.contributor.author | 杜欣怡 | zh_TW |
dc.date.accessioned | 2021-06-15T01:13:02Z | - |
dc.date.available | 2014-08-03 | |
dc.date.copyright | 2009-08-03 | |
dc.date.issued | 2009 | |
dc.date.submitted | 2009-07-29 | |
dc.identifier.citation | REFERENCE
[1] IEEE 802 Standards, http://standards.ieee.org/getieee/802 [2] http://www2.rohde-schwarz.com/ [3] B. Razavi, RF Microelectronics, Prentice Hall PTR, 1998 [4] R. Schaumann and M. E. V. Valkenburg, Design of analog filters, New York, Oxford University Press, 2001 [5] B. Nauta, “A CMOS Tansconductance-C Filter Technique for Very High Frequency ”, IEEE Journal of Solid-State Circuits, Vol. 27, No. 2, pp142- 153, Feb. 1992. [6] A. Lewinski, and J. Silva-Martinez, “OTA Linearity Enhancement Technique for High Frequency Applications with IM3 Below -65 dB,” IEEE Trans. Circuits Syst. II, Vol. 51, No. 10, pp. 542–548, Oct. 2004. [7] F. A. P. Baruqui and A. Petraglia, “Linearly Tunable CMOS OTA with Constant Dynamic Range Using Source-degenerated Current Mirrors,” IEEE Trans. Circuits Syst. II, Expr. Briefs, Vol. 53, No. 9, pp. 797–801, Sep. 2006. [8] I. S. Han, “A Novel Tunable Transconductance Amplifier Based on Voltage-controlled Resistance by MOS Transistors,” IEEE Trans. Circuits Syst. II, Expr. Briefs., Vol. 53, No. 8, pp. 662–666, Aug. 2006. [9] T. Y. Lo and C. C. Hung, “A 40-MHz Double Differential-pair CMOS OTA with -60 dB IM3,” IEEE Trans. Circuits Syst. I, Reg. Papers., Vol.55, No.1, pp.258-265, Feb. 2008. [10] T. Y. Lo and C. C. Hung, “ A 1-V 50-MHz Pseudo-differential OTA With Compensation of the Mobility Reduction” IEEE Trans. Circuits Syst. II, Expr. Briefs., Vol. 54, No. 12, pp. 1047–1051, Dec. 2007. [11] S. Hori, T. Maeda, H. Yano, N. Matsuno, K. Numata, N. Yoshida, Y. Takahashi, T. Yamase,R. Walkington, and H. Hida, “A Widely Tunable CMOS Gm-C Filter with a Negative Source Degeneration Resistor Transconductor” Proc. IEEE Eur. Solid-State Circuits Conf., pp. 449–452, 2003. [12] S. Hori, T. Maeda, N. Matsuno, and H. Hida, “Low-power Widely Tunable Gm-C Filter with an Adaptive DC-blocking, Triode-biased MOSFET Transconductor,” Proc. IEEE Eur. Solid-State Circuits Conf., pp. 99–102, Sep. 2004. [13] S. D’Amico, V. Giannini, and A. Baschirotto, “A 4th-order Active-Gm-RC Reconfigurable (UMTS/WLAN) Filter,” IEEE Journal of Solid-State Circuits, Vol. 40, No. 7, pp. 1143–1450, Jul. 2006. [14] T.-Y. Lo, C.-C. Hung, and M. Ismail, 'A Wide Tuning Range Gm-C Filter for Multi-Mode Direct-Conversion Wireless Receivers', IEEE Eur. Solid-State Circuits Conf., pp. 11-13, Sep. 2007 [15] T. Salo, S. Lindfors, and K. Halonen, “Direct Digital Tuning for Continuous - Time Filters,” IEEE Proc. of Midwest Symposium on Circuits and Systems,, Vol. 1, pp. 216–219. Aug. 2000 [16] Y. P. Tsividis, “Self-Tuned Filters,” IEE Electronics Letters, Vol. 17, pp. 406–407, Jun. 1981. [17] R. Schaumann and M. A. Tan, “The Problem of On-Chip Automatic Tuning in Continuous-Time Integrated Filters,” IEEE Proc. International Symposium on Circuits and Systems, Vol. 1, pp.106–109, 1989 [18] H. Khorramanabadi and P. R. Gray, “High-Frequency CMOS Continuous-Time Filters,” IEEE Journal of Solid-State Circuits, Vol. 19, No. 12, pp. 939–948, Dec.1984. [19] F. Krummenacher and N. Joehl, “A 4-MHz CMOS Continuous-Time Filter with On-Chip Automatic Tuning,” IEEE Journal of Solid-State Circuits, Vol. 23, No. 3, pp. 750–758, Jun. 1988. [20] J. Khoury, “Design of a 15-MHz CMOS Continuous-Time Filter with On-chip Tuning,” IEEE Journal of Solid-State Circuits, Vol. 26, No. 12, pp. 1988–1997, Dec. 1991. [21] J. Shin, S. Min, S. Kim, J. Choi, S. Lee, H. Park, and J. Kim, “3.3-V Baseband Gm-C Filters for Wireless Transceiver Applications,” IEEE Proc. International Symposium on Circuits and Systems, Vol. 1, pp. 457–460, May 2003 [22] T. R. Viswanathan, S. Murtuza, V. Syed, J. Berry and M. Staszel, “Switched-Capacitor Frequency Control Loop,” IEEE Journal of Solid-State Circuits, Vol. 17, No.8, pp. 775–778, Aug. 1982. [23] J. Silva-Martinez, M. S. J. Steyaert, and W. Sansen, “A 10.7-MHz 68-dB SNR CMOS Continuous-Time Filter with On-Chip Automatic Tuning,” IEEE Journal of. Solid-State Circuits, Vol. 27, No. 12, pp. 1843–1853, Dec. 1992. [24] E. Raisanen-Ruotsalainen, K. Lasanen, M. Sijander, and J. Kostamovaara, “A Low-Power 5.4 kHz CMOS Gm-C Bandpass Filter with On-Chip Center Frequency Tuning,” IEEE Proc. International Symposium on Circuits and Systems, Vol. 4, pp. 651–654, Aug. 2002 [25] J. Silva-Martinez, J. Adut, J. M.l Rocha-Perez, M. Robinson, and S. Rokhsaz, “A 60-mW 200-MHz Continuous-Time Seventh-order linear Phase Filter With On-Chip Automatic Tuning System.” IEEE Journal of Solid-State circuits, Vol. 38, No.2 , pp. 216-225, Feb. 2003 [26] A. Lopez-Martinez, R. Antonio-Chavez, and J. Silva-Martinez, “A 150 MHz Continuous-Time Seventh Order 0.05◦ Equiripple Linear Phase Filter with Automatic Tuning System,” IEEE Proc. International Symposium on Circuits and Systems, Vol. 1, pp. 156–159, May 2001 [27] M. Chen, J. Silva-Martinez, S. Rokhsaz, and M. Robinson, “A 1.8V CMOS, 80-200MHz Continuous-Time 4th Order 0.05◦ Equiripple Linear Phase Filter with Automatic Tuning System,” IEEE Proc. International Symposium on Circuits and Systems, Vol. 5, pp. 173–176, May 2002 [28] L.-H. Zhang, X.-G., Zhang, E. El-Masry “A Highly Linear Bulk-driven CMOS OTA for Continuous-time Filters” Journal of Analog Integrated Circuit and Signal Processing, Vol. 54, No. 3, pp. 229-236, Mar. 2008 [29] Y. K. Moon, H-M Seo, Y-K Park, K-H Won, M-H Yoon, J-J Yoo, and S-D Kim, “Design of a CMOS Highly Linear Channel-Select Filter and Programmable Gain Amplifier for WPAN Zero-IF Receiver.” IEEE Asia-Pacific Conference on Communication, pp. 450-453, Oct. 2005 [30] S. Hori, T. Maeda, H. Yano, N. Matsuno, K. Numata, N. Yoshida, Y. Takahashi, T. Yamase, R. Walkington, and H. Hida, “A Widely Tunable CMOS Gm-C Filter With a Negative Source Degeneration Resistor Transconductor.” IEEE Eur. Solid-State Circuits Conf., pp. 449–452, 2003 [31] T.-Y. Lo, C.-C. Hung, and C.-S. Kao “A Gm-C Continuous-time Analog Filter for IEEE 802.11 a/b/g/n Wireless LANs” Journal of Analog Integrated Circuits and Signal Processing, Vol. 1, pp. 1-4, Jul. 2007 [32] C-M Jiang, “A Low-Pass Channel Select Filter Design for IEEE 802.11a Direct Conversion System” Chung Hua University, 2004 [33] A. S. Korotkov, D. V. Morozov, A. A. Tutyshkin, and H. Hauer, “Channel Filters for Microelectronic Receivers of Wireless Systems.” Emerging Technologies: Circuits and Systems for 4G Mobile Wireless Communications, pp.24-31, Jun. 2005 [34] A. N. Mohieldin and E. Sánchez-Sinencio, “A Dual-mode Low-pass Filter for 802.11b/Bluetooth Receiver.” IEEE Eur. Solid-State Circuits Conf., pp. 423–426, 2004 [35] T.-Y. Lo and C.-C. Hung, “1V CMOS Gm-C Filters : Design and Applications” Springer Dordrecht Heidelberg London New York, 2009 | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42391 | - |
dc.description.abstract | 摘 要
隨著可攜式以及適用於多規格電子產品應用需求的增加,促進了低電壓供應及低功率消耗電路的設計趨勢,本論文的重點在於描述如何設計以及實現一個適用於無線接收器中的類比基頻濾波器。因此,在論文中,我們介紹了一個可以應用在多重規格直接降頻接收器的五階Butterworth轉導電容低通濾波器。 論文中的連續時間低通濾波器基於一個可調整的轉導工作放大器(OTA)使其頻寬可從2.2MHz操作至10MHz,而此轉導放大器藉由一個調整電壓控制其轉導值達到濾波器頻寬的選取。除此之外,本篇論文中,我們還實現了一個應用振幅鎖定迴路理論的頻率調整電路來補償製程偏移所造成的錯誤,在這樣的濾波器設計之下,此濾波器的頻寬範圍適用於IEEE 802.11a/b/g以及WCDMA等規格,如此設計藉由接收器電路的分享,不僅可以達到節省晶片面積的好處,還可以用同一晶片應用在多重規格的接收器中,達到一舉兩得的效果。 此五階低通濾波器以及頻率調整電路採用了台積電0.13微米的製程製造,並且使用台積電提供的0.13微米製程資料搭配Cadence軟體SPECTRE的使用進行電路模擬。在此設計下,可達到10MHz的頻寬應用在IEEE 802.11a/b/g的規格中,並在1.2伏特電源供應下消耗4.1毫瓦;在WCDMA頻寬為2.5MHz的規格中,消耗了4毫瓦,晶片面積大小為890µm×750µm。 | zh_TW |
dc.description.abstract | Abstractor
The growing demand of portable and multi-standard electronic applications has been encouraging the trend to design circuits with very low power supply voltage and low power consumption. This Thesis describes the design and implementation of analog baseband filter for wireless communication receivers. A 5th-order Butterworth transconductance-C (Gm-C) low-pass channel filter for a multi-standard direct-conversion receiver is presented. This continuous-time low-pass filter can operate in a range of -3dB frequencies from 0.9MHz to 11.2MHz with its tunable operational tansconductance amplifier (OTA). The transconductance can be tuned for a certain filter bandwidth by controlling the tuning voltage. Furthermore, a frequency tuning circuit based on magnitude locked loop is implemented for compensating the process variation. In this filter design, the tuning range is required to satisfy the specifications of IEEE 802.11a/b/g and WCDMA. The 5th-order LPF with a frequency tuning loop is fabricated in 0.13 µm TSMC CMOS process technology. The power consumption is 4.1mW with the cutoff frequency of 10MHz under a 1.2 V supply voltage for IEEE 802.11a/b/g. On the other hand, the power consumption is 4mW with the cutoff frequency of 2.5MHz under a 1.2 V supply voltage for WCDMA. The chip area is 890µm×750µm. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T01:13:02Z (GMT). No. of bitstreams: 1 ntu-98-R96943071-1.pdf: 1830081 bytes, checksum: 2b28a941382593c035981aa35bd80155 (MD5) Previous issue date: 2009 | en |
dc.description.tableofcontents | TABLE OF CONTENTS
ABSTRACT i LIST OF FIGURES vii LIST OF TABLES xi CHAPTER 1 INTRODUCTION 1 1.1 Motivation 1 1.2 Thesis Overview 2 CHAPTER 2 OVER VIEW OF FILTERS 3 2.1 Direct-Conversion Receiver 3 2.2 Filter Specifications 4 2.3 Filter Type Selection 5 2.4 Filter Topology 6 2.5 Filter Realization 8 2.5.1 Active RC Filter 8 2.5.2 MOSFET-C Filter 9 2.5.3 Gm-C Filter 10 CHAPTER 3 DESIGN OF OTA 13 3.1 Introduction to OTA Properties 13 3.2 Elementary OTA Building Blocks 14 3.2.1 Resistor 14 3.2.2 Gyrator 15 3.3 Analysis of The Proposed OTA Structure 17 3.3.1 Basic Operation of Proposed OTA 21 3.3.2 Detail Analysis of Proposed OTA 25 3.4 Simulation Results 29 CHAPTER 4 DESIGN OF GM-C FILTER 37 4.1 Filter Implementation 37 4.1.1 Passive RLC Ladder Filter 37 4.1.2 LC Gm-C Filter 40 4.2 Simulation Results 43 CHAPTER 5 AUTOMATIC TUNING SYSTEM 49 5.1 Principles of Automatic Tuning 49 5.1.1 Direct-Tuning 49 5.1.2 Switching-Filter Tuning 50 5.1.3 Master-Slave Tuning 51 5.2 Frequency Tuning Methods 52 5.2.1 Phase Locked Loop 52 5.2.2 Tuning Method Based on Charge Comparison 53 5.2.3 Magnitude Locked Loop 55 5.3 Implementation of Frequency Tuning System 56 5.3.1 Single to Differential Converter 58 5.3.2 Gm-C Integrator 59 5.3.3 Peak Detector 61 5.3.4 Comparator 65 5.3.5 Unit-gain Buffer 66 5.4 Simulation Results 67 CHAPTER 6 MEASUREMENT PLAN 73 6.1 Measurement Preparations 73 6.2 Measurement Results 78 CHAPTER 7 CONCLUSION 87 7.1 Conclusion 87 7.2 Future Work 87 REFERENCE 89 APPENDIX A LC LADDER ANALYSIS 93 APPENDIX B NETWORK SCALING 97 APPENDIX C DETAILS CIRCUIT DESIGNS 101 | |
dc.language.iso | en | |
dc.title | 應用於無線通訊之寬頻轉導電容濾波器 | zh_TW |
dc.title | A Wide Range Gm-C LPF Wireless Communication | en |
dc.type | Thesis | |
dc.date.schoolyear | 97-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 曹恆偉,劉深淵,林宗賢 | |
dc.subject.keyword | Butterworth,低通濾波器,轉導-電容,無線接收器, | zh_TW |
dc.subject.keyword | Butterworth,Low-pass Filter,Transconductance-C,Gm-C,Wireless Receiver, | en |
dc.relation.page | 107 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2009-07-29 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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