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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 胡振國 | |
dc.contributor.author | Chia-Ming Hsu | en |
dc.contributor.author | 許家銘 | zh_TW |
dc.date.accessioned | 2021-06-15T01:12:43Z | - |
dc.date.available | 2011-08-03 | |
dc.date.copyright | 2009-08-03 | |
dc.date.issued | 2009 | |
dc.date.submitted | 2009-07-30 | |
dc.identifier.citation | [1] Henri Moissan (1904). Biography from Nobelprize.org website
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[9] Ioffe Physico-Technical Institute, www.ioffe.ru/SVA/NSM/Semicond/SiC. [10] Harris, G.L., “Properties of SiC”, The Institute of Electrical Engineers, London, 1995. [11] Sima Dimitrijev, and Philippe Jamet1 “Advances in SiC power MOSFET technology “Microelectronics Reliability, Volume 43, Number 2, February 2003 , pp. 225-233(9) [12] Polytype distribution of circumstellar silicon carbide: “Microstructural characterization by transmission electron microscopy” Geochimica et Cosmochimica Acta, Vol. 67, No. 24, pp. 4743–4767, 2003 [13] S. W. Huang and J. G. Hwu, “Electrical Characterization and Process Control of Cost Effective High-k Aluminum Oxide Gate Dielectrics Prepared by Anodization Followed by Furnace Annealing,” IEEE Trans. Electron Devices, vol. 50, pp. 1658-1664, July 2003. [14] S. W. Huang and J. G. Hwu, “Ultrathin Aluminum Oxide Gate Dielectric on N-Type 4H-SiC Prepared by Low Thermal Budget Nitric Acid Oxidation,” IEEE 48 Trans. Electron Devices, vol. 51, pp. 1877-1882, Nov. 2004. [15] J. Robertson, “High dielectric constant gate oxides for metal oxide Si transistors,” Rep. Prog. Phys., vol. 69, pp. 327-396, 2006 [16] H. J. Osten, J. P. Liu, P. Gaworzewski, E. Bugiel, and P. Zaumseil, “High-k Gate Dielectrics with Ultra-low Leakage Current Based on Praseodymium Oxide,” in IEDM Tech. Dig., 2000, pp. 653-656. [17] W. J. Qi, R. Nieh, B. H. Lee, L. Kang, Y. Jeon, K. Onishi, T. Ngai, S. Banerjee,and J. C. Lee, “MOSCAP and MOSFET characteristics using ZrO2 gate dielectric deposited directly on Si,” in IEDM Tech. Dig., 1999, pp. 145-148. [18] Michel Houssa, “High-k Gate Dielectrics”, published by Institute of Physics Publishing (2004) [19] C. Auth, A. Cappellani, J.-S. Chun, A. Dalis, A. Davis, T. Ghani, G. Glass, T.Glassman, M. Harper, M. Hattendorf,P. Hentges, S. Jaloviar, S. Joshi, J. Klaus, K. Kuhn, D. Lavric, M. Lu, H. Mariappan, K. Mistry, B. Norris,N. Rahhal-orabi, P. Ranade, J. Sandford, L. Shifren, V. Souw, K. Tone, F. Tambwe, A. Thompson, D. Towner,T. Troeger, P. Vandervoorn, C. Wallace, J. Wiedemer, C. Wiegand, “45nm High-k + Metal Gate Strain-Enhanced Transistors.”. 2008 Symposium on VLSI Technology Digest of Technical Papers [20] 'Process Integration, Devices, and Structures'. International Technology Roadmap for Semiconductors: 2009 Update. [21] W.J. Cho and Y.C. Kim, “Characterization of annealing effects of low temperature chemical vapor deposition oxide films as application of 4H-SiC metal–oxide–semiconductor devices” J. Vac. Sci. Technol. B 20 (2002), p. 14.. [22] P. Mandracci, S. Ferrero, C. Ricciardi, L. Scaltrito, G. Richieri, C. Sgorlon, “Low temperature growth of SiO2 on SiC by plasma enhanced chemical vapor deposition for power device applications” Thin Solid Films, Vol. 427, pp. 142-146, 2003. [23] A. Poggi, R. Nipoti, S. Solmi, M. Barozzi and L. Vanzetti, ”Low temperature oxidation of SiC preamorphized by ion implantation,” Journal of Applied Physics, Vol. 95, No. 11, pp. 6119-6123, 2004. [24] Gerald Lucovsky and Hiro Niimi, “Remote plasma-assisted oxidation of SiC: a low temperature process for SiC-SiO2 interface formation that eliminates interfacial Si oxycarbide transition regions,” Journal of Physics Condensed 49 Matter, v 16, n 17, May 5, 2004, p S1815-S1837. [25] E. Bano, T. Ouisse, L. Dicioccio, and S. Karmann, “Surface potential fluctuations in metal-oxide-semiconductor capacitors fabricated on different silicon carbide polytypes”,Applied. Phys. Lett., vol. 65, pp.2723-2724, 1994. [26] E. H. Nicollian and J. R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, p. 41, John Wiley & Sons, New York (1982). [27] Kai-Chieh Chuang and Jenn-Gwo Hwuz, “Silicon Oxide Gate Dielectric on n-Type 4H–SiC Prepared by Low Thermal Budget Anodization Method” Journal of The Electrochemical Society, 155 (8) G159-G162 _2008 [28] Y. Y. Fan, R. E. Nieh, J. C. Lee, G. Lucovsky, G. A. Brown, L. F. Register, and S.K. Banerjee, IEEE Trans. Electron Devices, 49,2002 [29] Sorab K. Ghandhi, VLSI Fabrication Principles, 2nd ed., Wiley-Interscience, pp.487-495, 1994. [30] Keita Yagi1, Junji Murata2, Akihisa Kubota3, Yasuhisa Sano2, Hideyuki Hara2, Kenta Arima2, Takeshi Okamoto2, Hidekazu Mimura2, and Kazuto Yamauchi1, “Defect-Free Planarization of 4H–SiC(0001) Substrate Using Reference Plate” Jpn. J. Appl. Phys. 47 (2008) pp. 104-107 [31] K. H. J. Bushchow, R. W. Cahn, M. C. Flemings, B. Ilschner, E. J. Kramer, and S. Mahajan, Eds. Oxford Elsevier Science, (2001), pp. 8508-8519. [32] W. J. Choyke, H Matsunami and G. Pensl, Eds., “Silicon Carbide—Recent Major Advances”. Berlin, Germany: Springer-Verlag, pp. 785–812.373–386, 343–372 [33] D. J. Stirland and R. W. Bicknell, J. Electrochem. Soc., Volume 106, Issue 6, pp. 481-485 (June 1959) [34] Jeng-Kuei Chang, Chi-Min Liao, Chih-Hsiung Chen, and Wen-Ta Tsai, J. Electrochem. Soc. 150, B266 (2003) [35] H. Nicollian and J. R. Brews, MOS Physics and Technology ~Wiley,New York, 1982. [36] Kai-Chieh Chuang and Jenn-Gwo Hwu, J. Electrochem. Soc. 155, G159 (2008) [37] Ranbir Singh Reliability and performance limitations in SiC power devices Microelectronics Reliability 46 (2006) 713–730 [38] Wallace RM, Wilk G. “High-k gate dielectric materials.”MRS Bull 2002(March):192–7. [39] H. R. Lazar, V. Misra, R. S. Johnson, and G. Lucovsky “Characteristics of 50 metalorganic remote plasma chemical vapor deposited Al2O3 gate stacks on SiC metal–oxide–semiconductor devices” Appl. Phys. Lett. 79, 973 (2001) [40] P. Jamet, S. Dimitrijev, and P. Tanner, “Effects of nitridation in gate oxides grown on 4h-SiC,” J. Appl. Phys., vol. 90, pp. 5058-5063, Nov. 2001. [41] M.O. Aboelfotoh, R.S. Kern, S. Tanaka, R.F. Davis and C.I. Harris, Electrical characteristics of metal/AlN/n-type 6H-SiC(0001) heterostructures, Appl Phys Lett 69 (1996), p. 2873. [42] L.A. Lipkin and J.W. Palmour, Insulator investigation on SiC for improved reliability, IEEE Trans Electron Dev 46 (1999), p. 525. [43] H.R. Lazar and V. Misra, Characteristics of metalorganic remote plasma chemical vapor deposited Al2O3 gate stacks on SiC metal–oxide–semiconductor devices, Appl Phys Lett 79 (2001), p. 973. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/42368 | - |
dc.description.abstract | 本論文提出三種新穎製程,於碳化矽基板上成長介電層。在純水中以陽極氧化,再經快速熱退火製備氧化矽,以電導方法求得界面缺陷密度約為3×1011cm-2eV-1,此介電層崩潰電場大於6.3MV/cm 且電容電壓曲線無遲滯現象。於己二酸銨水溶液中使用陽極氧化法成長氧化鋁,首度應用於閘極介電層,先蒸鍍鋁薄膜再以陽極氧化得到超薄氧化鋁,等效氧化層厚度1.9 奈米,電容電壓曲線無遲滯現象,界面缺陷密度約為8×1011 cm-2eV-1,崩潰電場高達14.5 MV/cm 且在偏壓2 V時有著極小漏電流6×10-3 A/cm2。此外,以電漿濺鍍氧化製備氧化鋁介電層金氧半電容,閘極漏電流小於氧化矽一個數量級,從電容電壓曲線而言,低頻時比高頻時較接近理想值,且電容值與頻率於1k~500 kHz 時呈線性相關,我們提出一個等效電路模型,引入電感來解釋此現象,在電漿氧化過程中,並非所有的金屬都被氧化而部分奈米金屬殘留在介電層中。根據論文數據,這三種製程對於碳化矽高壓金氧半元件,有著重大突破。 | zh_TW |
dc.description.abstract | This thesis contains three novel dielectric processes about gate dielectric on 4H-SiC substrate. SiO2 was prepared by anodization in DI water followed by rapid thermal nnealing. The oxide breakdown strengths are greater than 6.3 MV/cm and the capacitance–voltage hysteresis is negligible. The interface state density was extracted using the conductance method and the value is of 3×1011cm-2eV-1. The first demonstration of anodized aluminum oxide (Al2O3) was grown in aqueous Ammonium Adipate solution as dielectric on 4H-SiC MOS capacitors. Ultrathin Al2O3 film (1.9nm) was prepared by anodic oxidation of ultrathin Al film followed by furnace annealing. The capacitance-voltage hysteresis is negligible and the interface trap density is low to ~8×1011 cm-2eV-1. The much higher breakdown field of 14.5 MV/cm and lower gate leakage current of 6×10-3 A/cm2 at 2 V are obtained.
Furthermore, we present the SiC MOS capacitor with Al2O3 film fabricated by plasma sputtering oxidation. The leakage current was one order This thesis contains three novel dielectric processes about gate dielectric on 4H-SiC substrate. SiO2 was prepared by anodization in DI water followed by rapid thermal annealing. The oxide breakdown strengths are greater than 6.3 MV/cm and the capacitance–voltage hysteresis is negligible. The interface state density was extracted using the conductance method and the value is of 3×1011cm-2eV-1. The first demonstration of anodized aluminum oxide (Al2O3) was grown in aqueous Ammonium Adipate solution as dielectric on 4H-SiC MOS capacitors. Ultrathin Al2O3 film (1.9nm) was prepared by anodic oxidation of ultrathin Al film followed by furnace annealing. The capacitance-voltage hysteresis is negligible and the interface trap density is low to ~8×1011 cm-2eV-1. The much higher breakdown field of 14.5 MV/cm and lower gate leakage current of 6×10-3 A/cm2 at 2 V are obtained.Furthermore, we present the SiC MOS capacitor with Al2O3 film fabricated by plasma sputtering oxidation. The leakage current was one order smaller than the typical thermal SiO2 and with good stress reliability. The low-frequency C-V curves are close near to ideal condition than high frequency and exhibit linear dependency on frequency from 1k to 500 kHz. We proposed a two-element equivalent circuit model including inductance to explain this phenomenon. It’s suggested that under the sputtering oxidation process, not all of the metal was oxidized completed and nanocrystal could be left inside the dielectric. Based on the reported results, the three processes could be useful to SiC MOS high-power devices. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T01:12:43Z (GMT). No. of bitstreams: 1 ntu-98-R96943051-1.pdf: 1708805 bytes, checksum: e3790c9370501d62a7fadd422cf38a5a (MD5) Previous issue date: 2009 | en |
dc.description.tableofcontents | 摘要.......................................... ...........I
Abstract ................................................II Figure Captions.........................................III Table Captions .................................................V Chapter 1 Introduction ...................................1 1‐1 Properties of SiC substrate ..........................1 1-2 Requirements for high-k gate dielectrics..............6 1-3 About This Work.......................................8 Chapter 2 SiO2 Dielectrics on 4H-SiC Prepared by Anodization in DI water..................................10 2-1 Introduction ........................................10 2-2 Experimental.........................................11 2-3 Results and discussion ..............................12 2-3-1 Capacitance-voltage (C-V) and current-voltage (I-V) characteristics..........................................12 2-3-2 Frequency dispersion of capacitance-voltage characteristics..........................................13 2-3-3 Process Control of Anodization.....................14 2-4 Summary..............................................16 Chapter 3 Ultrathin Anodized Aluminum Oxide on 4H-SiC MOS Capacitors Grown in Ammonium Adipate Solution ...........21 3-1 Introduction ........................................21 3-2 Experimental.........................................22 3-3 Results and discussion ..............................23 3-3-1 Capacitance-voltage (C-V) and current-voltage characteristics (I-V)....................................23 3-3-2 Interface trap obtained by conductance method......23 3-3-3 Stress reliability.................................24 3-4 Summary..............................................24 Chapter 4 Al2O3 High-k Gate Dielectrics on 4H-SiC MOS Capacitors Prepared by Plasma Sputtering in Ar/O2 Mixture Gas Oxidation ...............................................29 4-1 Introduction ........................................29 4-3 Results and discussion ..............................31 4-3-1 Capacitance-voltage (C-V) and (I-V) current-voltage characteristics..........................................31 4-3-2 Theoretical model and simulation of frequency dispersion ..............................................32 4-3-3 Constant voltage stress (CVS) characteristics..........................................34 4-4 Summary..............................................35 Chapter 5 Conclusions ...................................45 5-1 Conclusions .........................................45 5-2 Suggestions for Future Work .........................46 Reference ...............................................47 | |
dc.language.iso | en | |
dc.title | 碳化矽金氧半電容元件上新穎氧化矽與氧化鋁高介電常數閘極介電層 | zh_TW |
dc.title | Novel SiO2 and Al2O3 High-K Gate Dielectrics on 4H-SiC MOS Capacitors | en |
dc.type | Thesis | |
dc.date.schoolyear | 97-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 毛明華,林致廷,郭宇軒 | |
dc.subject.keyword | 金氧半,電容,氧化矽,氧化鋁,高介電,絕緣層,碳化矽,己二酸銨,陽級氧化,濺鍍, | zh_TW |
dc.subject.keyword | MOS,capacitor,SiO2,Al2O3,high-k,dielectric,Ammonium Adipate,anodization,sputter, | en |
dc.relation.page | 50 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2009-07-30 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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