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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 吳瑞北(Ruey-Beei Wu) | |
dc.contributor.author | Wei-Da Guo | en |
dc.contributor.author | 郭維德 | zh_TW |
dc.date.accessioned | 2021-06-15T00:36:12Z | - |
dc.date.available | 2013-12-24 | |
dc.date.copyright | 2008-12-24 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-12-18 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41893 | - |
dc.description.abstract | As the speed of digital signal increases toward multi-gigabit range, many non-ideal effects, such as reflection noise, crosstalk noise, transmission-line losses, and simultaneous switching noise, previously regarded to be negligible in the design of system interconnect have become the critical design challenges for satisfying the requirements of signal integrity (SI), power integrity (PI), and electromagnetic interference (EMI). Among them, the significant one is the frequency-dependent transmission-line losses that mainly come from the finite conductivity of imperfect conductor and the naturally electric polarization of dielectric material. The thus induced dispersion will exhibit a relative long-tail response on the transmitted signal. In other words, the lossy lines may cause serious inter-symbol interference (ISI) problem, resulting in the occurrence of poor eye-diagram performance or even the incorrect functionality of logic circuits, especially for the digital systems with the long-distance data transmission inside.
In this thesis, a fast methodology that employs only two anti-polarity one-bit data patterns as input signal is first proposed to simulate the worst-case eye diagram for the transmission- line system with a monotonic step response. Based on the assumption of a low-loss line, the impulse responses of lossy lines can be divided into three different mechanisms, which relate to the propagation delay, the conductive loss, and the dielectric loss, respectively. To resolve the causality problem in the transient analyses, the Kramers-Kroning (K-K) relations are utilized to refine the deficiency regarding the derived impulse response for the dielectric loss. Two design graphs for the worst-case eye-diagram characteristics vs. An and Bn, the quantification factors of conductive and dielectric losses, respectively, are constructed accordingly. Besides, the parametric analyses for the signal rising edges indicate that the effects of signal contents at the higher frequencies is negligible in the prediction of eye-opening profiles, while the unit interval in the pulse train is critical. As for the specified eye mask, both design graphs can be used to evaluate the maximally usable length of lossy transmission lines and if a designed system is workable. Favorable agreements shown in the eye-diagram comparisons with the HSPICE simulation and measurement results have validated the correctness and practicability of the present methodology. In order to compensate the eye-diagram performance degraded by the transmission-line losses, this thesis introduces two popular passive compensation schemes: one is the passive equalizer, and the other is the reflection gain induced by the insertion of the high-impedance element, i.e. inductance or high-impedance transmission line, into the load termination. The complete design methodologies for the two methods are well discussed. For the design of passive equalizer, a DC-level adapting method is proposed to determine the optimum DC level of the equalized response. The high-pass response that requires to be realized by the passive equalizer can then be obtained. RLC equalizer circuit is first adopted to avoid violating the impedance matching condition. A design method has been established to conveniently extract the values of lumped components inside the one-stage RLC equalizer circuit. Multiple stages may be adopted, but the simulation result does not show any further enhancement on the eye quality. RL equalizer circuit is also applicable when the impedance matching situation is not a critical concern. Good agreements between the simulations and measurements have verified the effectiveness of this compensation method. As for the design of high-impedance reflection gain, a systematic design methodology is proposed to resolve the optimal inductance or length of high-impedance line inserted into the conventional matched termination for the finest compensation efficiency. A simple expression is derived to give the optimal inductance design, while the optimal length of high-impedance line can be estimated using a quasi-static equivalent circuit followed by a correction factor. In addition, two help graphs are constructed to evaluate the enhancement of maximally usable length for the PCB-scale microstrip transmission line with compensation. Some experiments are also performed to validate the proposed concept. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T00:36:12Z (GMT). No. of bitstreams: 1 ntu-97-F92942062-1.pdf: 6326982 bytes, checksum: a6cb7a77691cb1e4c553f56a210a2c3e (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | Chapter 1 Introduction ------------------------- 1
1.1 Research Motivation ---------------- 1 1.2 Literature Survey ------------------ 2 1.3 Contributions ---------------------- 4 1.4 Chapter Outlines ------------------- 5 Chapter 2 PCB-Scale Lossy Transmission Line Theory ----- 9 2.1 Telegrapher’s Equations ------------------ 10 2.2 Conductive Loss --------------------------- 14 2.2.1 DC Resistance --------------------------- 14 2.2.2 AC Resistance --------------------------- 14 2.2.3 Surface Roughness ----------------------- 19 2.3 Dielectric Loss --------------------------- 20 2.4 Transfer Function Derivatio --------------- 23 2.5 Impulse Response Derivation --------------- 25 Chapter 3 Eye Diagram, Jitter, and Bit Error Rate (BER) 33 3.1 Eye Diagram ------------------------------- 33 3.2 Jitter ------------------------------------ 34 3.2.1 Random Jitter (RJ) ---------------------- 35 3.2.2 Deterministic Jitter (DJ) --------------- 36 3.3 Bit Error Rate (BER) ---------------------- 42 Chapter 4 Predictions of Worst-Case Eye-Diagram Characteristics -- 49 4.1 Worst-Case Eye Diagram Acquisition Methodology ------------------------- 50 4.2 Eye-Diagram Characteristics vs. An and Bn ----------------------------------------- 54 4.3 Effect of Signal Rising/Falling Edge ---------------------------------------------- 58 4.4 Maximally Usable Length ----------------------------------------------------------- 59 4.5 Effect of System Parameter Variation ---------------------------------------------- 61 4.6 Experimental Verification --------------------------------------------------------- 62 Chapter 5 Passive Equalizer Design for Best Eye-Diagram Compensation ------------------------ 67 5.1 Compensation Principle ------------------------------------------------------------ 68 5.2 DC-Level Adapting Method ---------------------------------------------------------- 70 5.3 RLC Equalizer Design -------------------------------------------------------------- 73 5.3.1 One-Stage Circuit --------------------------------------------------------------- 73 5.3.2 Two-Stage Circuit --------------------------------------------------------------- 79 5.4 RL Equalizer Design --------------------------------------------------------------- 81 5.5 Effect of System Parameter Variation ---------------------------------------------- 84 5.6 Experimental Verification --------------------------------------------------------- 86 5.7 Summary --------------------------------------------------------------------------- 88 Chapter 6 Reflection Gain Design for Best Eye-Diagram Compensation ------------------------ 91 6.1 Compensation Principle ------------------------------------------------------------ 92 6.2 Design Methodology ---------------------------------------------------------------- 98 6.2.1 Inductance Insertion ------------------------------------------------------------ 98 6.2.2 High-Impedance Transmission Line Insertion ------------------------------------- 100 6.3 Effect of System Parameter Variation --------------------------------------------- 103 6.4 Enhancement on Maximally Usable Length ------------------------------------------- 104 6.5 Experimental Verification -------------------------------------------------------- 106 6.6 Summary -------------------------------------------------------------------------- 107 Chapter 7 Conclusions and Future Works -------------- 111 7.1 Conclusions ----------------------------- 111 7.2 Future Works ---------------------------- 114 References ------------------------------------------- 115 Publication List ------------------------------------- 121 | |
dc.language.iso | en | |
dc.title | 印刷電路板級損耗傳輸線之眼圖分析與補償設計 | zh_TW |
dc.title | Eye-Diagram Analysis and Compensation Design of PCB-Scale Lossy Transmission Lines | en |
dc.type | Thesis | |
dc.date.schoolyear | 97-1 | |
dc.description.degree | 博士 | |
dc.contributor.oralexamcommittee | 陳俊雄,林建民,洪子聖,吳宗霖,林丁丙,黃天偉,洪志斌 | |
dc.subject.keyword | 眼圖,損耗傳輸線,信號完整度,印刷電路板,損耗補償,被動等化器,反射增益, | zh_TW |
dc.subject.keyword | Eye Diagram,Lossy Transmission Line,Signal Integrity,Printed Circuit Board,Loss Compensation,Passive Equalizer,Reflection Gain, | en |
dc.relation.page | 122 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-12-19 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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