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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 汪重光 | |
dc.contributor.author | Yi-Hsien Lin | en |
dc.contributor.author | 林宜賢 | zh_TW |
dc.date.accessioned | 2021-06-14T17:21:06Z | - |
dc.date.available | 2009-07-30 | |
dc.date.copyright | 2008-07-30 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-07-24 | |
dc.identifier.citation | [1] http://noc.twaren.net/index.php?option=com docman&task=doc download&gid=330
[2] IEEE Wireless Local Area Networks, 'Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) speci cations: Amendment 4: Enhancements for Higher Throughput,' IEEE P802.11nTM/D3.00 [3] R. van Nee and R. Prasad, 'OFDM for Wireless Multimedia Communications,' 3rd ed., Artech House, Boston, Jul. 2000 [4] A. Pandharipande, 'Principles of OFDM,' IEEE Potential, vol. 21, pp. 16-19, Apr./May. 2002 [5] Goldsmith, A., Jafar, S.A., Jindal, N., Vishwanath, S., 'Capacity limits of MIMO channels,' JSAC, vol. 21, pp.684-702, June 2003 [6] Ta-Sung Lee et al., '2006 Summer School for Communication Theory and Technologies' [7] Arogyaswami Paulraj, Rohit Nabar and Dhananjay Gore, 'Introduction to Space-Time Wireless Communications,' , Cambridge University Press, 2003 [8] TGn Sync Proposal Presentation: IEEE 802.11-04-0888-11-000n [9] WWiSE Proposal Presentation: IEEE 802.11-05-0150-02-000n [10] Siavash M. Alamouti, 'A Simple Transmit Diversity Technique for Wireless Communications,' IEEE JOURNAL ON SELECT AREAS IN COMMUNICATIONS, Vol. 16, No. 8, pp. 1451-1458, Oct. 1998 [11] P. W. Wolniansky, G. J. Foschini, G. D. Golden, R. A. Valenzuela, 'V-BLAST: An Architecture for Realizing Very High Data Rates Over the Rich-Scattering Wireless Channel,' URSI International Symposium on Signals, Systems, and Electronics, Vol. 29, pp. 295-300, Oct. 1998 [12] TGn Channel Model: Description of a MATLAB implementation of the Indoor MIMO WLAN channel model [13] TGn Channel Model: IEEE 802.11-03-0940-04-000n [14] Simon R. Sauders, 'Antennas and Propagation for Wireless Communication Systems,' Wiely, 2001 [15] A.A.M. Saleh and R.A. Valenzuela, 'A statistical model for inddor multipath propagation,' IEEE J. Select. Areas Commun., Vol. 5, pp. 128-137, Feb. 1987 [16] Wei-Hsiang Tseng, 'OFDM Baseband Transceiver Architecture Design and Implementation for IEEE 802.11a,' Master thesis, Jun. 2003 [17] Michael Speth, Stefan A. Fechtel and Heinrich Meyr, 'Optimum Receiver Design for Wireless Broad-Band Systems Using OFDMXPart I,' IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. 47, No. 11, pp. 1668-1677, Nov. 1999 [18] Lan Zhao, and V.K. Dubey, 'Detection Schemes for Space-Time Block Code and Spatial Multiplexing Combined System,' IEEE Communication Letters, Vol.9, No.1, pp. 49-51, Jan. 2005 [19] Angela Doufexi, Andrew Nix and Mark Beach, 'Combined Spatial Multiplexing and STBC to Provide Throughput Enhancement to Next Generation WLANs,' IST Mobile and Wireless Communications Summit, Dresden, 2005. [20] Y. Yang, Y. H. Chew, and T. T. Tjhung, 'Adaptive Frequency-Domain Equalization for Space-Time Block-Coded DS-CDMS Downlink,' IEEE International Conference on Communications, Vol. 4, pp. 2343-2346, May 2005 [21] A. Chandrakasan et al., 'Minimizing power using transformations,' IEEE Trans. Comput.-Aided Design, Vol. 14, pp. 12V31, Jan. 1995 [22] Manish Goel and Naresh R. Shanbhag, 'Finite-Precision Analysis of the Pipelined Strength-Reduced Adaptive Filter,' IEEE Transaction On Signal Processing, Vol.46, No.6, pp. 1763-1769, June 1998 [23] Chin-Hsien Lin, Yi-Hsien Lin, Chich-Feng Wu, Muh-Tian Shiue and Chorng-Kuang Wang, 'Cost E cient FEQ Implementation for IEEE 802.16a OFDM Transceiver,' prepare to be published [24] D. J. Defatta, J. G. Lucas, and W. S. Hodgkiss, 'Digital Signal Processing: A System Design Approach,' Ch.9, 3rd edition, 1990 [25] S. He and M. Torkelson, 'Designing pipeline FFT processor for OFDM (de)Modulation,' Proc. IEEE URSI Int.Symp.Sig.Syst. Electron., Vol. 29, pp.257-262, Oct. 1998 [26] Jia, L.,Goa,Y.,Isoho,J., and Yenhunen,H., 'A new VLSI-oriented FFT algorithm and implementation,' Proc. IEEE ASIC Conf., Vol. 13, pp. 337-341, Sept. 1998 [27] Yunho Jung, Hongil Yoon, and Jaeseok Kim, 'New E cient FFT Algorithm and Pipeline Implementation Results for OFDM/DMT Applications,' IEEE Transactions on Consumer Electronics, Vol. 49, No. 1, pp. 14-20, Feb. 2003 [28] Yu-Wei Lin, Hsuan-Yu Liu, Chen-Yi Lee, 'A Dynamic Scaling FFT Processor for DVB-T Applications,' IEEE J. Solid-State Circuits, Vol. 39, No. 11, pp. 2005-2013, Nov. 2004 [29] C.W. Hui, T.J. Ding, and J.V. McCanny, 'A 64-Point Fourier Transform Chip for Video Motion Compensation Using Phase Correlation,' IEEE Journal of Solid-State Circuits, Vol.31, pp.1751-1761, Nov. 1996. [30] Yu-Wei Lin, Hsuan-Yu Liu, Chen-Yi Lee, 'A 1-GS/s FFT/IFFT Processor for UWB Applications,' IEEE J. Solid-State Circuits, Vol. 40, No. 8, pp. 1726-1735, Aug. 2004. [31] T.Y. Chen, 'Design and Analysis of Cost E cient Multiplierless IFFT/FFT Processor for IEEE 802.11 OFDM System,' Master thesis, 2007 [32] K. Maharatna, E. Grass, and U. Jagdhold, 'A 64-point Fourier Transform Chip for High-Speed Wireless LAN Application Using OFDM,' IEEE J. Solid-State Circuits, Vol. 39, No.3, pp. 484-493, Mar. 2004 [33] B. M. Bass, 'A Low-Power, High-Performance, 1024-Point FFT Processor,' IEEE J. Solid-State Circuits, Vol. 34, pp. 380V387, Mar. 1999 [34] J. C. Kuo, C. H. Wen, and An-Yeu Wu, 'Implementation of a Programmable 64 to 2048-Point FFT/IFFT Processor for OFDM-based Communication Systems,' ISCAS, vol. II, pp. 121-124, May 2003 [35] Wen-Chang Yeh and Chein-Wei Jen, 'High-Speed and Low-Power Spit-Radix FFT,' IEEE Trans on signal processing, Vol. 51, No. 3, March, 2003 [36] Hsin-Lei Lin, Hongchin Lin, Yu-Chuan Chen and Robert C. Chang, 'A Novel Pipelined Fast Fourier Transform Architecture for Double Rate OFDM Systems,' SIPS, Vol. 13, pp. 7-11, Oct. 2004 [37] C.W. Hui, T.J. Ding, and J.V. McCanny, 'A 64-Point Fourier Transform Chip for Video Motion Compensation Using Phase Correlation,' IEEE Journal of Solid-State Circuits, Vol.31, pp.1751-1761, Nov. 1996 [38] Chin-Teng Lin, Yuan-Chu Yu, and Lan-Da Van, 'A Low-Power 64-Point FFT/IFFT Design for IEEE 802.1 l a WLAN Application,' ISCAS, Vol. 21, pp.4523-4526, May 2006 | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/41165 | - |
dc.description.abstract | 隨著多媒體應用的快速發展,具有高資料傳輸速率(data rate)的無線網路益加重要。為此,根據多輸入多輸出正交分頻多工(MIMO-OFDM)技術的IEEE 802.11n也應運而生,以提高傳輸速率。本篇論文中提出一個符合IEEE 802.11n 之數位基頻接收器設計,其中包含了符元邊界偵測、同步追蹤迴路設計、快速傅利葉轉換器以及MIMO 等化器。
文中首先分析二種MIMO 傳輸模式:Alamouti 以及VBLAST,而後更採取並行的方式以兼得高資料傳輸速率與高傳輸品質的優點。如此之模式可達到100Mbps,滿足11n 中資料傳輸速率的基本需求。 藉由簡化的複數乘法器設計, 在本篇論文中提出了一個低複雜度MISO/MIMO 的等化器演算法以供Alamouti 傳輸模式。此演算法包含三個部份:通道估測、MISO/MIMO 信號偵測解碼、以及通道資訊的更新。在一般的狀況下,由此演算法設計之等化器可以減少32%乘法運算的複雜度;而在11n 的系統之中,則可以減少33%的乘法複雜度。利用室內多路徑衰減通道的系統模擬可以得知,運用此演算法之等化器能達到與傳統等化器相同的SER 表現。 此外,文末呈現一個64 點SISO 的快速傅利葉轉換器晶片,並以FPGA 板驗證之。藉由分析系統需求,可以計算出SDF 管線架構之傅利葉轉換器的各項參數。經過改良後的複數乘法器設計以及適當之記憶體安排,在0.18 μm CMOS製程下,此傅利葉轉換器晶片的核心面積為0.570 mm × 0.565 mm;在40 MHz之工作頻率下,消秏功率為10.8 mW。最後,透過Altera Stradix EP1S80 FPGA板,並以Tektronix TLA 715 邏輯分析儀量測,此傅利葉轉換器功能之正確性得到了驗證。 | zh_TW |
dc.description.abstract | The high data-rate wireless transmission is the demand for many multimedia applications. For this purpose, IEEE 802.11n is the wireless LAN standard to offer higher throughput based on MIMO-OFDM techniques. In this thesis, a digital baseband receiver is presented for IEEE 802.11n, including the initial boundary detection, synchronization tracking loop, FFT, and MIMO equalization.
For MIMO transmission schemes, Alamouti and VBLAST are presented here. Furthermore, the combined scheme is taken to achieve both of the advantages, i.e. higher data rate and better quality. The combined scheme can satisfy a 100Mbps requirement of IEEE 802.11n standard. Based on strength-reduced complex multiplication, a cost e cient MISO/MIMO equalization is proposed for Alamouti scheme. The cost efficient MISO/MIMO equalization contains three parts: channel estimation, MISO/MIMO detection and updating process. The overall algorithm can reduce 32 % multiplication complexity in general case compared with 33 % in 11n case. The system performance of this design is the same as the conventional technique evaluated by the uncoded SER simulation over indoor multipath fading channel. Finally, a 64-point SISO FFT/IFFT processor is realized in the chip design and evaluated by FPGA board. By analyzing the system performance, the parameters of FFT/IFFT can be derived for SDF pipeline structure. By multiplierless design and memory arrangement, the chip core area occupies 0.570 mm x 0.565 mm and consumes 10.8 mW at operating frequency 40MHz using 0.18 um CMOS technology. The FFT/IFFT functionality is also veri ed by Altera Stradix EP1S80 FPGA board and Tektronix TLA 715. | en |
dc.description.provenance | Made available in DSpace on 2021-06-14T17:21:06Z (GMT). No. of bitstreams: 1 ntu-97-R95943028-1.pdf: 2772425 bytes, checksum: 59dddc29a74c08d8e1ae5f8a1e2a917d (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | 1 Introduction 1
1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Thesis Overview . . . . . . . . . . . . . . . . . . 3 2 Principles of MIMO-OFDM 5 2.1 OFDM technique . . . . . . . . . . . . . . . . . . . 5 2.1.1 OFDM Signal Model . . . . . . . . . . . . . . . . 5 2.1.2 Guard interval and Cyclic Prefix . . . . . . . . . 7 2.2 MIMO technique . . . . . . . . . . . . . . . . . . . 9 2.2.1 MIMO Signal model . . . . . . . . . . . . . . . . 9 2.2.2 MIMO Channel Capacity . . . . . . . . . . . . . . 10 2.2.3 Space Diversity . . . . . . . . . . . . . . . . . 10 2.2.4 MIMO transmission schemes . . . . . . . . . . . . 11 2.3 MIMO-OFDM technique . . . . . . . . . . . . . . . . 12 3 System Specication 15 3.1 An Overview of Wireless LAN . . . . . . . . . . . . 15 3.2 IEEE 802.11n Specication . . . . . . . . . . . . . 17 3.2.1 Packet Formats . . . . . . . . . . . . . . . . . . 18 3.2.2 System Parameters . . . . . . . . . . . . . . . . 19 3.2.3 HT-LTF Arrangement . . . . . . . . . . . . . . . . 20 3.2.4 Pilot Structure . . . . . . . . . . . . . . . . . 22 3.2.5 Constellation Mapping . . . . . . . . . . . . . . 22 3.2.6 Space-Time Encoder . . . . . . . . . . . . . . . . 23 4 Wireless Channel Model 25 4.1 MIMO Channel . . . . . . . . . . . . . . . . . . . . 25 4.2 Spatial Correlation . . . . . . . . . . . . . . . . 27 4.3 Multipath Rayleigh Fading . . . . . . . . . . . . . 28 4.4 Path Loss and Shadowing . . . . . . . . . . . . . . 30 4.5 Additive White Gaussion Noise . . . . . . . . . . . 31 4.6 Timing Frequency Offset. . . . . . . . . . . . . . . 31 4.7 Carrier Frequency Offset . . . . . . . . . . . . . . 32 5 Receiver Design 33 5.1 Packet Detection . . . . . . . . . . . . . . . . . . 34 5.1.1 Coarse Symbol Boundary Detection . . . . . . . . . 34 5.1.2 Fine Symbol Boundary Detection . . . . . . . . . . 35 5.2 CFO estimation . . . . . . . . . . . . . . . . . . . 37 5.2.1 Coarse/Fine CFO Estimation . . . . . . . . . . . . 37 5.2.2 Residual CFO Tacking Loop . . . . . . . . . . . . 38 5.3 Phase Compensation . . . . . . . . . . . . . . . . . . . . . . 40 6 MIMO Equalization Design 43 6.1 Channel estimation . . . . . . . . . . . . . . . . . 44 6.2 MIMO Detection . . . . . . . . . . . . . . . . . . . 46 6.2.1 Alamouti Scheme . . . . . . . . . . . . . . . . . 47 6.2.2 VBLAST Scheme . . . . . . . . . . . . . . . . . . 49 6.2.3 Combined scheme of Alamouti and VBLAST . . . . . . 50 6.2.4 System Simulation Results . . . . . . . . . . . . 54 6.3 LMS Adaptation for STBC . . . . . . . . . . . . . . 56 6.4 Cost Effcient MIMO Equalization . . . . . . . . . . 59 6.4.1 Strength-Reduced Multiplication . . . . . . . . . 59 6.4.2 Cost Effcient MISO/MIMO Detection . . . . . . . . 59 6.4.3 Cost Effcient Updating . . . . . . . . . . . . . . 64 6.4.4 Cost Effcient Channel Estimation . . . . . . . . . 67 6.4.5 Comparisons and System Simulation . . . . . . . . 69 FFT/IFFT Hardware Implementation 73 FFT/IFFT Algorithm . . . . . . . . . . . . . . . . . . . 73 FFT/IFFT Architecture . . . . . . . . . . . . . . . . . 75 Fixed-Point Analysis . . . . . . . . . . . . . . . . . . 77 Hardware Consideration . . . . . . . . . . . . . . . . . 79 7.4.1 Processing Element . . . . . . . . . . . . . . . . 79 7.4.2 Memory Arrangement . . . . . . . . . . . . . . . . 80 7.4.3 Twiddle Factor Design . . . . . . . . . . . . . . 81 7.4.4 FFT/IFFT Transform . . . . . . . . . . . . . . . . 83 FPGA Emulation and Chip Implementation . . . . . . . . . 84 7.5.1 FPGA Emulation Results . . . . . . . . . . . . . . 86 7.5.2 Gate-Level Simulations and Chip Summary . . . . . 87 Conclusion 91 | |
dc.language.iso | en | |
dc.title | 應用於MIMO 無線區域網路之低複雜度等化器設計與快速傅利葉轉換器硬體設計與實作 | zh_TW |
dc.title | Cost Efficient MIMO Equalization Design for MIMO WLAN and FFT/IFFT Hardware Implementation | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 闕志達,吳安宇,周世傑,薛木添 | |
dc.subject.keyword | 多輸入多輸出,正交分頻多工,時空區塊編碼,等化器,傅利葉轉換器, | zh_TW |
dc.subject.keyword | MIMO,OFDM,STBC,FEQ,FFT, | en |
dc.relation.page | 96 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-07-26 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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