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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 吳瑞北(Ruey-Beei Wu) | |
dc.contributor.author | Yung-Shou Cheng | en |
dc.contributor.author | 鄭詠守 | zh_TW |
dc.date.accessioned | 2021-06-14T17:03:28Z | - |
dc.date.available | 2011-08-05 | |
dc.date.copyright | 2008-08-05 | |
dc.date.issued | 2008 | |
dc.date.submitted | 2008-07-28 | |
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[2] J. C. Coetzee and J. Joubert, “Full-wave characterization of the crosstalk reduction effect of an additional grounded track introduced between two printed circuit tracks,” IEEE Trans. Circuits Syst. I, vol. 43, no. 7, pp. 553-558, July 1996. [3] G. Yang and Y. Lu, “Crosstalk analysis of high speed digital microstrip traces over a slotted ground plane using the non-uniform FDTD method,” in 2007 IEEE Int. Symp. Electromagnetic Compat., pp. 118-121, 23-26 Oct. 2007, Qingdao, China. [4] Z. Li, Q. Wang, and C. Shi, “Application of guard traces with vias in the RF PCB layout,” in 2002 IEEE Int. Symp. Electromagnetic Compat., pp. 771–774, 21-24 May 2002, Beijing, China. [5] A. Suntives, A. Khajooeizadeh, and R. Abhari, “Using via fences for crosstalk reduction in PCB circuits,” in 2006 IEEE Int. Symp. Electromagnetic Compat., pp. 34–37, 14-18 Aug. 2006, Portand, Orgeon, USA. [6] D. S. Britt, D. M. Hockanson, F. Sha, J. L. Drewniak, T. H. Hubing, and T. P. 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Electromagnetic Compat., pp. 1-5, July 2007 Honolulu, Hawaii. [11] F.-J. Pajares, M. Ribó, J.-R. Regué, Pablo R.-C. and L. Pradell, “A multimodal analysis of the effects of guard traces over near wideband signal paths,” in 2005 IEEE Int. Symp. Electromagnetic Compat., pp. 933-936, Aug. 2005 [12] W. T. Huang, C. H. Chen, C. H. Lu, S. Y. Tan, “Accurate design methodology to prevent crosstalk,” in Proc. IEEE TENCON, pp. 1-4, Oct. 2007 [13] T. R. Gazizov, “Far-end crosstalk reduction in double-layered dielectric interconnects,” IEEE Trans. Electromagn. Compat., vol. 43, no. 4 pp. 566–572, Nov. 2001. [14] P. Muthana, and H. Kroger, “Behavior of short pulses on tightly coupled microstrip lines and reduction of crosstalkby using overlying dielectric,” IEEE Trans. Adv. Packag., vol. 30, no. 3, pp. 511-520 Aug. 2007. [15] F. D. Mbairi, W. P. Siebert, and H. Hesselbom, “On the problem of using guard traces for high frequency differential lines crosstalk reduction,” IEEE Trans Component and Package. Tech., vol. 30, no. 1, pp. 67-74 March 2007 [16] S. Nara and K. Koshiji, “Study of delay time characteristics of multi-layered hyper-shield meander line,” in Proc. IEEE Int. Symp. Electromagnetic Compat., pp. 760–763, Aug. 2006 [17] G.-H. Shiue; C.-Y. Chao; W.-D. Guo; R.-B. Wu, “Improvements of time-domain transmission waveform in serpentine delay line with guard traces” in Proc. IEEE Electromagnetic Compatibility (EMC), pp. 1-5, July 2007 [18] W. D. Guo, G. H. Shiue, and R. B.Wu, 'Comparison between serpentine and flat spiral dealay lines on Tranaient Reflection/Transmission waveforms and eye diagrams', IEEE Trans. Microwave Theory Tech., vol. 54, pp. 1379-1387, April 2006. [19] H. W. Johnson, High-speed digital design: a handbook of black magic, Englewood Cliffs, N.J. Prentice Hall,1993, ch5 pp.201 [20] C. R. Paul, Introduction to Electromagnetic Compatibility 2ed edition, John Wiley & Sons, 2006, ch. 3, p. 129 [21] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System. Design, A Handbook of Interconnect Theory and Design Practices. Hoboken, NJ: Wiley, 2000, ch. 3, p. 48 [22] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System. Design, A Handbook of Interconnect Theory and Design Practices. Hoboken, NJ: Wiley, 2000, ch. 3, p. 57 [23] 趙嘉瀅,使用接地防護線降低串音雜訊,國立台灣大學碩士論文,2007年1月 [24] HSPICE v2006.09, SYNOPSYS Corporation (www.synopsys.com) [25] D. Pavlidis, H. L. Hartnagel, “The design and performance of three-line microstrip Couplers,” IEEE Trans. Microwave theory Tech., vol. MTT-24, pp. 631-640, Oct. 1976 [26] R. B. Wu, Time-Domain Simulation for Transmission Lines, Research Project under Grant NSC-80-0404-E002-36, 1990. [27] CST Microwave Studio v 2006 , Computer Simulation Technology (http://www.cst.com) [28] W. Fan, A. Lu, L. L. Wai, B. K. Lok, “Mixed-Mode S-Parameter Characterization of Differential Structures,” in Proc. IEEE Electronics Packaging Tech., pp. 533-537, Dec 2003 [29] 薛光華,差模轉角與信號線跨槽不連續效應結構之模型化、分析與設計,國立台灣大學博士論文,2006年7月 [30] W. R. Eisenstadt, B. Stengel, and B. M. Thompson, Microwave Differential Circuit Design Using Mixed-Mode S-Parameters, Boston: Artech House, 2006, ch. 2, p. 43-44 [31] ADS2006, Agilent Technologies. (www.agilent.com) [32] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System. Design, A Handbook of Interconnect Theory and Design Practices. Hoboken, NJ: Wiley, 2000, ch. 3, p. 48, p. 53, Appendix. C, p. 330 [33] D. M. Pozar, Microwave Engineering 3rd ed, John Wiley, 2005, ch.7, pp. 437 – 448 [34] R. B. Wu and F. L. Chao, “Laddering wave in serpentine delay line,” IEEE Trans. Comp., Packg., Manuf. Technol., B, vol. 18, no. 4, pp. 644–650, Nov. 1995. [35] W. D. Guo, G. H. Shiue, and R. B.Wu, 'Comparison between serpentine and flat spiral dealay lines on Tranaient Reflection/Transmission waveforms and eye diagrams', IEEE Trans. Microwave Theory Tech., vol. 54, pp. 1379-1387, April 2006. [36] C. L. Wang, G. H. Shiue and R. B Wu, “EBG-enhanced split power planes for wideband noise suppression”, Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting, pp.61 – 64, Oct. 2005. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/40852 | - |
dc.description.abstract | 在高速且高密度的數位電路中,研究串音效應的抑制方法,已成為最主要的信號完整度主題之一。其中,接地防護線越來越常被用來減緩由於電路佈線密集,所引發的串音雜訊干擾。
在本論文中,首先利用去耦合的模態進行微帶線上的防護線效應分析。防護線上的接地連通柱彼此之間會互相耦合引發共振現象,在鄰近線段上感應出振鈴雜訊,此現象經由去耦合的模態分析可以得到振鈴雜訊的量化分析。接下來,分別針對不同的介電常數與基板厚度,分析電容與電感耦合量的變化趨勢,並且與相對應的近端和遠端串音模擬波形比較,進行耦合傳輸線在雙層介質的環境中振鈴雜訊抑制的研究。並利用實驗量測數據,以驗證模擬分析結果。 最後將防護線設計,應用在差模傳輸線的串音效應抑制,延伸到改善差模蛇形延遲線的TDR與TDT波形的信號完整度及延遲時間偏差的問題。然而,防護線置入耦合傳輸線間會造成阻抗不匹配,因此提出縮小傳輸線寬的改善方法,避免阻抗不匹配帶來得反射損耗。並且經由比較置入防護線以及縮小線寬後,對於眼圖的改善程度,根據分析的結果提出適當的設計準則。 | zh_TW |
dc.description.abstract | In the high-speed and high-density digital circuits, the problem of crosstalk-noise reduction becomes one of the major signal integrity concerns. Among them, the guard traces are increasingly used to alleviate this problem as the dense interconnect layouts emerge.
In this thesis, the effect of a guard trace for the signaling transmission in a microstrip line is first analyzed from a multi-modal point of view. A multi-modal analysis allows a simple interpretation of the phenomena involved the ringing noise due to the resonance of shorting pin on a guard trace. Subsequently, the ringing-noise reduction for coupled-interconnect structures in a double-layered structure of varying dielectric constant and substrate thickness is investigated by calculating the capacitive and inductive couplings and analyzing the simulated near-end and far-end crosstalk waveforms. Additionally, the experimental results are presented to compare with and demonstrate the time-domain simulations of crosstalk reduction designs as proposed. Furthermore, using the guard traces to avoid the coupling between the differential pairs and to improve the signal integrity of TDR and TDT responses and timing skew of differential-serpentine delay-lines is performed in this thesis. However, the characteristic impedance of differential pair is decreased after guard trace is inserted between coupled transmission line sections. The impedance compensation can be achieved by shrinking the signal trace to avoid the reflection loss owing to impedance mismatch. According to the result of eye-pattern analysis, the proper design method is proposed in this thesis. | en |
dc.description.provenance | Made available in DSpace on 2021-06-14T17:03:28Z (GMT). No. of bitstreams: 1 ntu-97-R95942085-1.pdf: 3030825 bytes, checksum: c43e65c0468dc3c3cb3249b327aeee4f (MD5) Previous issue date: 2008 | en |
dc.description.tableofcontents | 摘 要 I
Abstract III 目 錄 V 圖 表 索 引 VII 第一章 簡介 1 1-1 研究動機 1 1-2 文獻回顧與探討 2 1-3 章節概要 3 1-4 成果貢獻 3 第二章 串音理論與防護線特性分析 5 2-1串音理論分析 5 2-1-1 等效電路模型 5 2-1-2 串音雜訊成因 7 2-1-3 去耦合模態分析 10 2-2防護線上多重耦合串音機制 15 2-3受擾線上振鈴雜訊特性分析 22 2-3-1 三平行耦合線的去耦合模態 22 2-3-2 振鈴雜訊估算公式 25 第三章 單端耦合線串音雜訊之分析與防護線設計 31 3-1 微帶線、嵌入式微帶線與帶線之串音雜訊比較 31 3-2 微帶線與帶線之接地防護線設計 33 3-3 利用雙層介質抑制振鈴雜訊分析 35 3-4 結合雙層介質之防護線設計方法 40 第四章 差模串音之分析與抑制方法 45 4-1 差模傳輸線特性 45 4-1-1 差模信號 45 4-1-2 混合模態散射參數 46 4-2 差模串音抑制之防護線設計 49 4-3 差模蛇形延遲線之TDR與TDT波形 55 4-3-1 單端延遲線之串音感應機制 55 4-3-2 差模延遲線之串音感應機制 57 4-4 利用防護線改善TDR與TDT波形與眼圖改善 60 4-5 置入防護線後阻抗不匹配之補償設計 67 第五章 實驗量測 71 5-1 利用雙層介質抑制振鈴雜訊 71 5-2 差模蛇形延遲線置入防護線後TDT眼圖改善分析 76 參考文獻 83 | |
dc.language.iso | zh-TW | |
dc.title | 接地防護線之電氣特性與降低串音雜訊設計 | zh_TW |
dc.title | Electrical Characteristics of Guard Traces and
Design Schemes of Crosstalk Noise Reduction | en |
dc.type | Thesis | |
dc.date.schoolyear | 96-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 林建民(Chien-Min Lin),薛光華(Guang-Hwa Shiue),盧信嘉(Hsin-Chia Lu) | |
dc.subject.keyword | 接地防護線,串音效應,蛇線,差模訊號, | zh_TW |
dc.subject.keyword | Guard trace,Crosstalk,Serpentine delay line,Differential signal, | en |
dc.relation.page | 86 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2008-07-29 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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