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標題: | 低雜訊放大器與分散式放大器之設計與實作 Design and Implementation of Low Noise Amplifiers and Distributed Amplifiers |
作者: | Mu-Tsung Lai 賴木聰 |
指導教授: | 曹恆偉 |
關鍵字: | 低雜訊放大器,超寬頻,分散式放大器,增益提升技巧, Low noise amplifier,ultra-wideband,distributed amplifier,gain-enhancement technique, |
出版年 : | 2008 |
學位: | 碩士 |
摘要: | 於信號接收路徑上,低雜訊放大器是系統前端中相當重要的零組件。因為訊號經由天線進來之後,立即進入低雜訊放大器來放大,所以它決定了整個系統的雜訊指數以及輸入電壓駐波比。而寬頻放大器亦有廣泛應用,如在高速的光纖通訊系統中做為寬頻放大器,感測器、微波及毫米波通訊系統或是一個寬頻結構中當作是一個放大單元來使用。分散式放大器正是一個適合於上述應用的結構,它具有相當大的增益頻寬乘積,以及很低的輸入輸出反射損耗。
本論文內容可分為三大主題,分別為超寬頻無線通訊系統和寬頻技術的原理介紹、利用標準互補式金氧半導體製程來實現K頻段之低雜訊放大器以及利用分散式的架構來實現寬頻放大器。 基本原理部分,分別介紹了超寬頻無線通訊和寬頻技術的概念,及電路所須要的規格。 之後,會先介紹一個新穎類似摺疊疊接架構的K頻段之低雜訊放大器。在34.76GHz時量測得到的增益為12.4dB,功率消耗為74.8mW。 第三個部分為,利用分散式的結構來實現寬頻放大器。論文中一共提出兩個使用標準互補式金氧半導體製程之分散式放大器。其中之一採用類似摺疊疊接架構做為增益級,其量測得到的頻寬為3.2~6.57GHz,增益為12.6dB。另外一個設計則應用了增益提升的技巧,模擬結果具有23dB的增益,41.7GHz的頻寬且消耗136mW。 In the receiving path, low noise amplifier (LNA) is a very important building block at the front end of the communication system. Because the received signal is amplified through LNA, which is behind the antenna, it dominates the noise figure (NF) and input voltage standing-wave ratio (VSWR) of the overall system. On the other hand, wideband amplifiers are widely used in high-speed optical communication systems, microwave/millimeter-wave communications, sensor systems, or wideband instruments. Distributed amplifiers (DA) provide very high gain-bandwidth products, together with lower input and output return losses for broadband applications. This thesis is divided into three parts. First, some fundamental concepts of UWB wireless communication systems and wideband circuit techniques are introduced. Second, the design and performance of a K-band LNA using standard CMOS process is presented. Finally, two distributed amplifiers are described. Some important fundamental theories of UWB wireless communication and wideband circuit techniques are reviewed. Some essential circuit performance specifications are also introduced. Also presented in this thesis is the design of a K-band LNA using a modified folded cascade structure that achieved a measured gain of 12.4 dB at 34.76 GHz with associated power consumption of 74.8mW. Finally, two broadband amplifiers are implemented using distributed circuit techniques. A 3.2~6.57 GHz DA architecture with a modified folded cascade gain stage achieves a measured gain of 12.6 dB. Another DA with gain-enhancement in its gain stage achieves a simulated 23 dB gain with a bandwidth of 41.7 GHz bandwidth and power consumption of 136 mW. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/40426 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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