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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平(Chung-Ping Chen) | |
dc.contributor.author | Yi-Hao Chang | en |
dc.contributor.author | 張益豪 | zh_TW |
dc.date.accessioned | 2021-06-13T17:24:19Z | - |
dc.date.available | 2006-01-01 | |
dc.date.copyright | 2005-02-02 | |
dc.date.issued | 2005 | |
dc.date.submitted | 2005-01-27 | |
dc.identifier.citation | Bibliography
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Kim, Yu-Min Lee, and Charlie Chung-Ping Chen, 'Linear Time Hierarchical Capacitance Extraction Without Multipole Expansion,' International Conference on Computer Design (ICCD), pp. 98-103, 2001. [7] S. Yan, J. Liu, and W. Shi, 'Improving boundary element methods for parasitic extraction,' in Proceeding of 2003 Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 261-267, Jan. 2003. [8] W. Shi and F. Yu, 'A divide-and-conquer algorithm for 3D capacitance extraction,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 8, pp. 1157-1163, Aug. 2004. [9] S. Yan, V. Sarin, and W. Shi, “Sparse Transformations and Preconditioners for Hierarchical 3-D Capacitance Extraction with Multiple Dielectrics,” in Proceeding of ACM/IEEE Design Automation Conference (DAC), pp. 788-793, 2004. [10] J. Tausch and J. White, “A multiscale for fast capacitance extraction,” in Proceeding of ACM/IEEE Design Automation Conference (DAC), pp. 537-542, 1999. [11] M. Beattie and L. Pileggi, “Electromagnetic parasitic extraction via a multipole method with hierarchical refinement,” in Proceeding of International Conference on Computer Aided Design (ICCAD), pp. 437-444, 1999 [12] Matthew N. O. Sadiku, “Monte Carlo Methods in an Introductory Electromagnetic Course,” IEEE Transactions on Education, vol. 33, no. 1, pp. 73-80, Feb. 1990. [13] Y. L. Le Coz and R. B. Iverson, “A stochastic algorithm for high speed capacitance extraction in integrated circuits,” Solid State Electronics, vol. 35, no. 7, pp. 1005-1012, 1992. [14] Jinsong Hou and Xu Zhu, “Quasi-3D Capacitance Computation for VLSI Full Chip Extraction,” in Proceeding of International Conference on Design Automation (ICDA), 2000. [15] Jason Cong and Lei He, “Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology,” in Proceeding of ACM/IEEE Design Automation Conference (DAC), pp. 627-632, 1997. [16] S. Yen and N. Shirali, “Capacitance Extraction,” Cadence Design Systems Application Note, 1995. [17] The International Technology Roadmap for Semiconductors (2001). [18] J. Barnes and P. Hut. “A hierarchical O(nlogn) force calculation algorithm,” Nature, vol. 324, 1986. [19] A Grama, V. Sarin, and A. H. Sameh, “Improving error bounds for multipole-based treecodes,” SIAM J. Sci. Comput., vol. 21, no. 5, pp. 1790-1803, 2000. [20] J. Tausch and J. White, “Mesh refinement strategies for capacitance extraction based on residue errors,” IEEE 5th Tropical Meeting, pp. 236-237, 1996. [21] Roger F. Harrington, “Field Computation by Moment Methods,” IEEE Press, 1993. [22] Albert Ruehli and Pierce Brennan, “Efficient Capacitance Calculations for Three-Dimension Multiconductor Systems,” IEEE Transaction on Microwave Theory and Techniques, pp. 76-82, Feb. 1973. [23] Y. Saad and M. H. Schultz, “GMRES: A generalized minimal residual algorithm for solving nonsymmetric linear systems,” SIAM J. Sci. Stat. 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Plassmann, “An improved incomplete Cholesky factorization,” Argonne National Laboratory, 1992. [33] Hasan Dag and F. L. Alvarado, “Computer-Free Preconditioners for the Parallel Solution of Power System Problems,” IEEE Transactions on Power Systems, vol. 12, no. 2, pp. 585-591, May 1997. [34] Tsung-Hao Chen and Charlie Chung-Ping Chen, 'Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods,' in Proceeding of ACM/IEEE Design Automation Conference (DAC), 2001. [35] T. Lu, Z. Wang, and W. Yu, ”Hierarchical block boundary-element method (HBBEM): a fast field solver for 3-D capacitance extraction,” IEEE Transactions on Microwave Theory and Techniques, vol. 52, issue: 1, pp.10 – 19, Jan. 2004. [36] B. Krauter, X. Yu, A. Dengi, and L. Plieggi, “A sparse image method for BEM capacitance extraction,” in Proceeding of ACM/IEEE Design Automation Conference (DAC), pp. 357-362, June 1996. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/39206 | - |
dc.description.abstract | 本篇論文主要闡述在三維電容抽取中有效地產生一個隱含稀疏變換的電位係數矩陣,之前所有的電容抽取演算法都是基於邊界元素法並且以所有的葉節點來定義電位係數矩陣,基於任一小導體表面均可視為基底的前提下,ICCAP發現以所有葉節點作為基底的變換將會得到一個最緊密的線性方程式。因此,ICCAP提出一個可以在線性時間內找出最佳基底的演算法,它可以保證在線性時間內建立出一個僅含有O(n)元素的電位係數矩陣。由此,這個稀疏變換可以使用前置式疊代解矩陣的方法加速整個線性方程式的求解速度。 | zh_TW |
dc.description.abstract | This thesis presents ICCAP to efficient generate sparsified potential coefficient matrices for three-dimensional capacitance extraction. Previous capacitance extraction algorithms based on boundary element formulate the potential coefficient matrix in terms of surface potentials and charges on the most delicate panels (leaf panels). By introducing the concept of basis panels, ICCAP reveals that leaf panels compose the worst basis which leads to the densest system. Therefore, ICCAP proposes a linear time basis panel selection algorithm to choose a new set of basis panels. It is provable that the n x n potential coefficient matrix constructed in terms of the new basis contains O(n) non-zero entries and hence the sparse system can be solved more efficiently by preconditioned iterative matrix solvers. | en |
dc.description.provenance | Made available in DSpace on 2021-06-13T17:24:19Z (GMT). No. of bitstreams: 1 ntu-94-R91943082-1.pdf: 2040992 bytes, checksum: c593a9548b52b784aaf67b4a6bf8cd01 (MD5) Previous issue date: 2005 | en |
dc.description.tableofcontents | Table of Contents
Abstract (Chinese) i Abstract ii Acknowledgements iii List of Tables vi List of Figures vii Chapter 1. Introduction 1 1.1 Motivation …………………………………………1 1.2 What is Parastic Capacitance Extraction ……3 1.3 Previous Works ……………………………5 1.4 Our Contribution …………………………………6 1.5 Organization of the Thesis …………………7 Chapter 2. Preliminaries 8 2.1 Boundary Element Method .…………………………8 2.2 Conjugate Gradient Method ……………………11 2.3 Preconditioned Conjugate Gradient Method ……13 2.4 Hierarchical Algorithm (HiCap and PHiCap Algorithm) 16 Chapter 3. ICCAP Algorithm 21 3.1 Selecting Basis Panels …………………………23 3.1.1 Implicit congruence transformation ………………25 3.1.2 Algorithm for generating independent panels ……29 3.2 Direct Formulation of J’ in Linear Time ……31 3.3 Extracting E from J’ ……………………………33 3.4 Solving P’q’=v’ …………………………………33 3.5 Complexity Analysis …………………………………34 Chapter 4. Experimental Result 35 Chapter 5. Conclusion 40 Bibliography 41 | |
dc.language.iso | en | |
dc.title | 一個隱含稀疏變換的三維電容抽取演算法 | zh_TW |
dc.title | ICCAP: A Linear Time 3-D Capacitance Extraction Algorithm with Congruence Transformation | en |
dc.type | Thesis | |
dc.date.schoolyear | 93-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 李建模(Chien-Mo Li),黃鐘揚(Ric Huang) | |
dc.subject.keyword | 電容抽取, | zh_TW |
dc.subject.keyword | Capacitance Extaction, | en |
dc.relation.page | 44 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2005-01-27 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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