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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳少傑 | |
| dc.contributor.author | Yong-Hsiang Hsieh | en |
| dc.contributor.author | 謝永強 | zh_TW |
| dc.date.accessioned | 2021-06-13T16:30:55Z | - |
| dc.date.available | 2006-07-28 | |
| dc.date.copyright | 2005-07-28 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-12 | |
| dc.identifier.citation | [1] Wireless (Wi-Fi) networking equipment for enterprises and service providers. Available: http://www.proxim.com/
[2] IEEE Wireless LAN Standards. [Online] Available: http://standard- s.ieee.org/getieee802/802.11.html [3] C. Muschallik., “Influence of RF oscillators on an OFDM signal,” IEEE Transactions on Consumer Electronics, Vol. 41, no. 3, pp. 592 – 603, Aug. 1995. [4] D. Petrovic, W. Rave, G. Fettweis., “Performance degradation of coded-OFDM due to phase noise,” Vehicular Technology Conference, Vol. 2, Apr. 2003, pp. 1168 – 1172. [5] W. Eberle, J. Tubbax, B. Come; S. Donnay, H. De Man, G. Gielen., “OFDM-WLAN receiver performance improvement using digital compensation techniques,” in Proc. IEEE Radio and Wireless Conference, RAWCON, Aug. 2002, pp. 111-114. [6] K. Vavelidis, I. Vassiliou, T. Georgantas, A. Yamanaka, S. Kavadias, G. Kamoulakos, C. Kapnistis, Y. Kokolakis, A. Kyranas, P. Merakos, I. Bouras, S. Bouras, S. Plevridis, N. Haralabidis., “A Dual-Band 5.15-5.35 GHz, 2.4-2.5 GHz 0.18um CMOS Transceiver for 802.11 a/b/g Wireless LAN,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1180-1184, July 2004. [7] M. Zannoth, T. Ruhlicke, B.-U Klepser., “A Highly Integrated Dual-Band Multimode Wireless LAN Transceiver,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1191-1195, July 2004. [8] R. Ahola, A. Aktas, J. Wilson, K.R Rao, F. Jonsson, I. Hyyrylainen, A. Brolin, T. Hakala, A. Friman, T. Makiniemi, J. Hanze, M. Sanden, D. Wallner, Yuxin Guo; T. Lagerstam, L. Noguer, T. Knuuttila, P. Olofsson, M. Ismail., “A Single-Chip CMOS Transceiver for 802.11a/b/g Wireless LANs,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2250-2258, Dec 2004. [9] Y.H. Hsieh, W.Y. Hu, S.M. Lin, C.L. Chen, W.K. Li, S.J. Chen, D.J. Chen., “An Auto I/Q-Calibrated CMOS Transceiver for 802.11g,” in Proc. ISSCC, Feb., 2005, pp. 92-93. [10] A. Georgiadis., “Gain, phase imbalance, and phase noise effects on error vector magnitude,” IEEE Transactions on Vehicular Technology, vol. 53, no. 2, pp.443 – 449, March 2004. [11] B. Razavi, RF Microelectronics. Englewood Cliffs, NJ: Prentice Hall, 1998. [12] A. Zolfaghari, A. Chan, B. Razavi., “Stacked Inductors and Transformers in CMOS Technology,” IEEE J. Solid-State Circuits, vol. 36, no. 4, pp. 620-628, April 2001. [13] H. Samavati, H.R. Rategh and T.H. Lee., “A 5-GHz CMOS Wireless LAN receiver Front End,” IEEE J. Solid-State Circuits, vol. 35, no. 5, pp. 765-772, May 2000. [14] W. John, M. Rogers and C. Plett., “A 5-GHz Radio Front-End With Automatically Q-Tuned Notch Filter and VCO,” IEEE J. Solid-State Circuits, vol. 38, no. 9, pp. 1547-1554, September 2003. [15] SAWTEK 855898 Data Sheet [Online] Available: http://www.sawtek.com/ [16] M. Zargari, D.K. Su, C.P. Yue, S. Rabii, D. Weber, B.J. Kaczynski, S.S. Mehta, K. Singh, S. Mendis, B.A. Wooley., “A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems,” IEEE J. Solid-State Circuits, vol37, no. 12, pp.1688-1694, Dec 2002. [17] P.C. Huang, L.Y. Chiou, and C.K. Wang, “A 3.3V CMOS Wideband Exponential Control Variable Gain Amplifier,” in Proc. IEEE Int. Symposium on Circuit and Systems, Montery, vol. 1, pp. 285-288, Jun. 1998. [18] A.M. Ismail and A.M. Soliman, “Novel CMOS Wide-Linear-Range Transconductance Amplifier,” IEEE Transactions on Circuit and System-I: Fundamental Theory and Application, vol. 47, no. 8, pp. 1248-1253, August 2000. [19] B. Razavi., “A 5.2-GHz CMOS Receiver with 62-dB Image Rejection,” IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 810-815, May 2001. [20] B. Razavi, CMOS Analog Circuit Design, Englewood Cliffs, NJ: Prentice Hall, 1998. [21] M. Fualkner, T. Mattsson, and W. Yates, “Automatic Adjustment of Quadrature Modulators,” Electronics Letters, vol. 27, no. 3, pp. 214-216, Jan 1991. [22] L. Der, B. Razavi., “A 2-GHz CMOS Image Reject Receiver with LMS Calibration,” IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 167-175, Feb 2003. [23] S.P. Wu, Y. Bar-Ness., “OFDM Systems in the Presence of Phase Noise: Consequences and Solution,” IEEE Transactions on Communication, vol. 52, no. 11, pp. 592 – 603, Aug. 1995. [24] IEEE 802.11g White Paper. Available http:// www.broadcom.com/collateral/wp/ 802.11g-WP104-R.pdf | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38342 | - |
| dc.description.abstract | 本文詳述如何利用Superheterodyne架構，設計符合IEEE 802.11g標準之無線收發器．為了解決高速無線通訊對收發器內I/Q調變器和解調器的增益和相位對稱要求，本收發器提供發送端與接收端I/Q增益和相位自動校正功能．當收發器完成自動校正，I/Q增益差少於0.1dB，I/Q相位差少於1度．收發器電路使用 TSMC 0.25μm 1P5M CMOS製程來實現．電路操作電壓為2.7V，接收端的雜訊指數(noise figure)達到5.1dB，發送端的輪出功率壓縮點(output gain compression point P-1dB)高於7dBm． | zh_TW |
| dc.description.abstract | The CMOS transceiver IC exploits the superheterodyne architecture to implement a low-cost RF front-end with an auto-I/Q calibration function for IEEE 802.11g. The transceiver supports I/Q gain and phase mismatch auto tuning mechanisms at both the transmitting and receiving ends, which are able to reduce the phase mismatch to within one degree and gain mismatch to 0.1dB. Implemented in a 0.25 | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T16:30:55Z (GMT). No. of bitstreams: 1 ntu-94-D88921028-1.pdf: 2710436 bytes, checksum: 45812db2ba194d0155a25b4c8bb42660 (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | ABSTRACT
LIST OF FIGURES iv LIST FO TABLES vii CHAPTER 1. INTRODUCTION 1 1.1 Wireless LAN standards ……………………………………… 1 1.1.1 IEEE 802.11 ……………………………………………………1 1.1.2 HiperLan ………………………………………………………1 1.1.3 HiperLan II ……………………………………………………2 1.1.4 OpenAir …………………………………………………………2 1.1.5 HomeRF and SWAP ………………………………………………2 1.1.6 BlueTooh ………………………………………………………2 1.2 Wireless in the 21st Century ………………………………3 1.3 The 802 Standard and the IEEE ………………………………3 1.3.1 IEEE 802.11b …………………………………………………4 1.3.2 IEEE 802.11a …………………………………………………4 1.3.3 IEEE 802.11g ………………………………………………5 1.3.4 Performance and Characteristic …………………………5 1.4 Background and Motivation ……………………………………7 1.5 IEEE 802.11g RF Transceiver Performance Requirement …8 1.5.1 Synthesizer Output Phase Noise …………………………8 1.5.2 Circuit Linearity ……………………………………………9 1.5.3 Modulator/Demodulator I/Q Gain and Phase Imbalance 9 1.6 Transceiver Design Goal …………………………………10 1.6.1 Solutions on I/Q Balance …………………………………10 CHAPTER 2. TRANSCEIVER ARCHITECTURE DESIGN 13 2.1 Receiver Architectures ………………………………………13 2.1.1 Superheterodyne Receiver …………………………………13 2.1.2 Low-IF Receiver ……………………………………………16 2.1.3 Zero-IF Receiver ……………………………………………18 2.2 Comparison and our Choice ………………………………… 21 2.3 Transceiver Architecture …… …………………………… 22 2.4 The Choice of Intermediary Frequency (IF) …………… 24 2.5 Receiver Chain Link Budget ……………………………… 29 2.5.1 Receiver Adjacent Channel Rejection …………………29 2.5.2 Receiver Cascade Gain ……………………………………30 2.5.3 Receiver Cascade Noise Figure …………………………32 2.5.4 Receiver Dynamic Range ……………………………………35 2.5.4.1 RF/IF Section Gain Windows ……………………………36 2.5.4.2 Receive IF VGA and I/Q Demodulator Specification 41 2.5.4.3 Cascade Gain of IF/BB …………………………………42 2.5.4.4 Cascade Noise Figure of IF/BB ………………………42 2.6 Transmitter Chain Link budget ……………………………44 2.6.1 Transmit Circuits Gain Distribution and Gain Range 44 2.6.2 Transmit Error Vector Magnitude (EVM) ………………46 2.6.3 Transmit Signal Spectral Mask ………………………… 47 CHAPTER 3. I/Q MODULATOR AND DEMODULATOR DESIGN 49 3.1 I/Q Modulator and Demodulator Architecture Overview 49 3.2 Variable Gain Control Amplifier and Low-pass Filter Re-Use ……………………………………………………………………50 3.2.1 RX/TX Two-Mode Variable Gain Control Amplifier ……50 3.2.2 RX/TX Two-Mode Low-pass Filter …………………………53 3.3 DC Offset Cancellation ………………………………………54 CHAPTER 4. AN AUTO-I/Q CALIBRATED MODULATOR 59 4.1 DC Offset, I/Q Gain and Phase Imbalance ………………59 4.2 DC Offset, I/Q Gain and Phase Imbalance Auto-Calibration …………………………………………………………63 4.2.1 DC Offset Auto-Calibration ………………………………64 4.2.2 I/Q Gain Mismatch Auto-Calibration ……………………66 4.2.3 I/Q Quadrature Mismatch Auto-Calibration ……………67 4.2.4 Implementation of I/Q Auto-Calibration Circuitry …68 4.2.5 TX I/Q Auto-Calibration Measurement Result …………72 CHAPTER 5. AN AUTO-I/Q CALIBRATED DEMODULATOR 77 5.1 Single Test Tone Design ……………………………………77 5.2 I/Q Gain Imbalance and Quadrature Phase Mismatch Auto-Calibration ………………………………………………………… 78 5.2.1 I/Q Gain Imbalance Auto-Calibration …………………78 5.2.2 I/Q Quadrature Phase Mismatch Auto-Calibration ……81 5.2.3 Implementation of I/Q Auto-Calibration Circuitry …84 5.3 RX I/Q Auto-Calibration Measurement Result ……………85 CHAPTER 6. SYSTEM MEASUREMENT RESULT 87 6.1 Transmitter Measurement Result ……………………………88 6.2 Receiver Measurement Result ………………………………91 CHAPTER 7. CONCLUSION 95 REFERENCE 97 | |
| dc.language.iso | zh-TW | |
| dc.subject | 相位差 | zh_TW |
| dc.subject | 增益差 | zh_TW |
| dc.subject | 無線收發器 | zh_TW |
| dc.subject | 自動校正 | zh_TW |
| dc.subject | 無線通訊 | zh_TW |
| dc.subject | auto calibration | en |
| dc.subject | Transceiver | en |
| dc.subject | IEEE 802.11g | en |
| dc.subject | Mismatch | en |
| dc.subject | DC offset | en |
| dc.subject | Superheterodyne | en |
| dc.subject | gain imbalance | en |
| dc.subject | phase imbalance | en |
| dc.title | 具I/Q自動校正之CMOS IEEE 802.11g收發器 | zh_TW |
| dc.title | An auto-I/Q calibrated CMOS IEEE 802.11g Transceiver | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 博士 | |
| dc.contributor.oralexamcommittee | 馮武雄,李泰成,溫?岸,吳介琮,郭建男,林宗賢,闕志達 | |
| dc.subject.keyword | 無線收發器,自動校正,無線通訊,增益差,相位差, | zh_TW |
| dc.subject.keyword | Transceiver,IEEE 802.11g,Mismatch,DC offset,Superheterodyne,gain imbalance,phase imbalance,auto calibration, | en |
| dc.relation.page | 99 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2005-07-12 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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