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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38297Full metadata record
| ???org.dspace.app.webui.jsptag.ItemTag.dcfield??? | Value | Language |
|---|---|---|
| dc.contributor.advisor | 郭正邦 | |
| dc.contributor.author | " Nai-Chung,Wang" | en |
| dc.contributor.author | 王廼忠 | zh_TW |
| dc.date.accessioned | 2021-06-13T16:29:47Z | - |
| dc.date.available | 2010-07-20 | |
| dc.date.copyright | 2005-07-20 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-12 | |
| dc.identifier.citation | 參考文獻
第1章 [1.1] stanford.edu/group/chart/PowerDensity [1.2] A. P. Chandrakasan, S. Sheng and R. W. Brodersen, “Low-power CMOS digital design,” IEEE J. Solid-State Circuits., vol. 27, no. 4, Apr, 1992. [1.3] C. Svensson and A. Alvandpour, “Low power and low volatage CMOS digital circuit techniques,” in Proc. Low Power Electronics and Design, pp7-10, 1998. [1.4] Alain Guyot and Selim Abou-Samra,”Low power CMOS Ditital Design,” in Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on , pp. IP6- I13, 1998. [1.5] IEEE International Solid-State Circuits Conference (ISSCC). [1.6] P. K. Vasudev and P. M. Zeitzoff, 'Si-ULSI with a scaled-down future:Trends and challenges for ULSI semiconductor technology in thecoming decade,' IEEE Circuits and Devices Magazine, vol. 14, no. 3, pp.19-29, 1998. [1.7] J. E. Brewer, 'A new and improved roadmap: the ntrs provides the high-level vision necessary to facilitate future advancements in semiconductor technology,' IEEE Circuits and Devices Magazine, vol. 14, no. 3, pp. 13-18, 1998. [1.8] B. Davari, R. H. Dennard, and G. G. Shahidi, 'CMOS scaling for high performance and low power—the next ten years,' IEEE Proceeding, vol. 83, no. 4, pp. 595-606, 1995 第2章 [2.1] W. C. Athas, L. J. Svensson, “Reversible logic issues in adiabatic CMOS,” in Proc. Workshop on Physics and Computing, PhysComp ’94, pp. 111-118, Nov. 1994. [2.2] J. G. Koller, W. C. Athas, “Adiabatic switching, low energy computing, and the physics of storing and erasing information,” in Proc. Workshop on Physics and Computation, PhysCmp ’92, Oct. 1992; IEEE Press, 1993. [2.3] J. S. Denker, “A review of adiabatic computing,” in Proc. 1994 Symp. Low Power Electronics/Digest of Technical Papers, San Jose, CA, Oct. 1994, pp. 94-97. [2.4] W. C. Athas, L. J. Svensson, J. G. Koller, N. Tzartzanis, and Y. Chou, “Low-power digital systems based on adiabatic-switching principles,” IEEE Trans. Very Large Scale Integration Syst., vol. 2, PP. 398-406, Dec. 1994. [2.5] Y. Ye and K. Roy, “Energy recovery circuits using reversible and partially reversible logic,” IEEE Trans. On Circuits and Syst.Ⅰ, pp.769-778. Setp. 1996. [2.6] Y. Moon, D. K. Jeong, “An efficient charge recovery logic circuit,” IEEE J. Solid-State Circuits, vol. 31, pp. 514-522, Apr, 1996. [2.7] WILLIAM J.DALLY, JOHN W. POULTON, 'Digital System Engineering,' CAMBRIDGE 2000 [2.8] TAKAYASU SAKURAI, A. RICHARD NEWTON, 'Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas,' IEEE JOURNAL OF SOLID-STATE CIRCUIT, VOL.25, NO. 2 APRIL 1990 [2.9] James B.Kuo, Jea-Hong Lou, 'Low-Voltage CMOS VLSI Circuits,' JOHN WILEY & SONS,INC. 1999 [2.10] J. H. Lou and J. B. Kuo, 'A 1.5-V Full-Swing Bootstrapped CMOS Large Capacitive-Load Driver Circuit Suitable for Low-Voltage CMOS VLSI,' IEEE J. Sol. St.Ckts, 28(4), 408-414(1993) [2.11] Bai-Kong, Dong-Oh Kang, and Young-Hyun Jun, 'A Bootstrapped CMOS Circuit Technique for Low-Voltage Application,' IEEE J. Sol. St.Cjts, VL2-01, 289-232(1999) 第3章 [3.1] S. Kim and M. C. Papaefthymiou, “True single-phase energy-recovering logic for low-power, high-speed VLSI,” in Proceedings of International Symposium on Low-Power Electronics and Design, pp.167-172, Aug. 1998. [3.2] T. Itakura, H. Minamizaki, T. Saito, T. Kuroda, “A 402-output TFT-LCD Driver IC with Power Control Based on the Number of Color Selected,” IEEE J. Solid-State Circuits, Vol. 38, No. 3, pp. 503-510, March 2003. [3.3] C. F. Law, K. S. Yeo, and R. S. Samir, “Sub-1V Bootstrapped CMOS Driver for Giga-Scale-Integration Era,” Elec. Lett., Vol. 35, No. 5, pp. 392-393, 1999. [3.4] K. S. Yeo, J. G. Ma, M. A. Do, “Ultra-Low-Voltage Bootstrapped CMOS Driver for High Performance Applications,” Elec. Lett., Vol. 36, No. 8, pp. 706-707, 2000. [3.5] J. H. Lou and J. B. Kuo, “A 1.5V Full-Swing Bootstrapped CMOS Large Capacitive-Load Driver Circuit Suitable for Low-Voltage CMOS VLSI,” IEEE J. Solid-State Circuits, Vol. 32, No. 1, pp. 119-121, 1997. [3.6] Y. Zhang, H. H. Chen, and J. B. Kuo, “0.8V CMOS Adiabatic Differential Switch Logic Circuit Using Bootstrap Techniques for Low-Voltage Low-Power VLSI,” Elec. Lett., Vol. 38, No. 24, pp. 1497-1499, 2002. [3.7] H. P. Chen and J. B. Kuo, “A Low-Voltage CMOS Load Driver with the Adiabatic and Bootstrap Techniques for Low-Power System Applications,” MWSCAS Proc., Hiroshima, July 2004. [3.8]G.Y. Liu, N.C. Wang and J.B. Kuo “Energy-Efficient CMOS Large-load Driver Circuit With Complementary Adiabatic/Bootstrap (CAB) Technigue For Low Power TFT-LCD System Application” IEEE International Symposium on Circuit and System, ISCAS 2005 第4章 [4.1]Tetsuro Itakura,Hironori Minamizaki,Tetsuya Saito, Tadashi Kuroda 'A 402-Output TFT-LCD Driver IC with Power Control Based on the Number of Colors Selected'IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL. 38,NO. 3,MARCH 2003. [4.2]Charels H. Roth “Fundamental of Logic Design”Fourth Edition. [4.3]Behzad Razavi “Principles of Data Conversion System Design” [4.4] Tetsuro Itakura,Hironori Minamizaki,Tetsuya Saito, Tadashi Kuroda, Corporate Research and Development Center, Toshiba Corporation, Semiconductor Company, Toshiba Corporation 'A 402-Output TFT-LCD Driver IC with Power-Controlling Function Selecting Number of Colors' IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/38297 | - |
| dc.description.abstract | 摘要
第一章中將說明低功率電路設計的趨勢和低功率絕熱電路技術的介紹。 第二章說明絕熱電路之原理，分析數個傳統多時脈絕熱電路和一般提升式驅動電路並說明其優劣。 第三章提出一個使用能量有效率之互補式金氧半大負載驅動電路使用互補式絕熱/提升式技術藉由雙對偶路徑系統。經過HSPICE模擬後，與使用單路徑的驅動電路作效能比較，証明此改良電路在、功率回收與訊號的完整度上較原電路具有更好的表現。 第四章為一整的液晶顯示器源汲驅動電路系統的設計與模擬驗證，並在輸出端使用一個迴旋率加強的輸出緩衝器來順利的驅動一個薄膜電晶體液晶顯示器的一個畫素。 | zh_TW |
| dc.description.abstract | Abtract
In chapter 1, the trend of low voltage design, and its good and bad in recent years will be described In chapter 2, the principles of adiabatic technology will be described. Then several conventional adiabatic and bootstrapped driver circuit families are reviewed, and analyzed with discussion about the advantages and disadvantages. In chapter 3, energy-efficient CMOS large-load driver circuit with the complementary adiabatic/bootstrap technique via dual path are proposed. And by HSPICE simulation, it is proved that in power consumption have been improved to compare with signal path driver circuit. In chapter 4, a whole LCD source driver circuit system will be design and simulation, and we can succeed driver one LCD cell by a slew rate enhancement output buffer. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T16:29:47Z (GMT). No. of bitstreams: 1 ntu-94-R92943134-1.pdf: 1970885 bytes, checksum: ed219837499fd948b22ec3d25ed04245 (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | 目錄
第1章 導論 1 1.1 低功率的趨勢 1 1.2 CMOS電路的消耗功率 3 1.3 低電壓低功率電路架構-絕熱邏輯電路 5 1.4 本論文目標 6 第2章 絕熱邏輯電路與提升式驅動電路 7 2.1 絕熱電路原理 7 2.1.1絕熱損耗 7 2.1.2非絕熱損耗 11 2.1.3結論 12 2.2 絕熱邏輯電路設計分析 13 2.2.1ECRL絕熱邏輯電路 15 2.3 提升式驅動電路和工作原理…………………………...16 2.3.1 提升式電路工作原理……………………………....16 2.3.2 傳統全幅提升式電路……………………………....18 2.3.3 單一提升電容閘鎖式邏輯驅動電路BLCL……….20 2.4 結論………………………………………………….…..23 第3章 能量有效率之互補式金氧半大負載驅動電路使用互補式絕熱/提升式技術系統……………………………………………………..25 3.1 能量有效率之互補式金氧半大負載驅動電路使用互補式絕熱/提升式技術 25 3.1.1提升式電晶體開關技術…….……………………...…25 3.1.2所提之能量有效率之互補式金氧半大負載驅動電路使用互補式絕熱/提升式技術................................28 3.2 能量有效率之互補式金氧半大負載驅動電路使用互補式絕熱/提升式技術之效能評估…………………………….33 3.3 結論 37 第4章 液晶顯示器源極驅動電路………………………………38 4.1薄膜電晶體液晶顯示器簡介及系統架構 ……..……….38 4.1.1 簡介………………………………………………………38 4.1.2薄膜電晶體液晶顯示器源極驅動系統架構……..40 4.2薄膜電晶體液晶顯示器源極驅動電路……………..…..42 4.2.1薄膜電晶體液晶顯示器源極驅動電路細部電路分析…………………………………………....……42 4.2.2薄膜電晶體液晶顯示器源極驅動電路整體輸入/輸出關係模擬………………………………....……50 第5章 結論 54 參考文獻 55 第1章 55 第2章 56 第3章 57 第4章 58 | |
| dc.language.iso | zh-TW | |
| dc.subject | 液晶顯示器驅動電路 | zh_TW |
| dc.subject | 絕熱邏輯電路 | zh_TW |
| dc.subject | LCD Driver Circuit | en |
| dc.subject | Adiabatic Logic Circuit | en |
| dc.title | 液晶顯示器驅動電路:絕熱邏輯電路與液晶顯示器源極驅動電路 | zh_TW |
| dc.title | LCD Driver Circuit : Adiabatic Logic Circuit And LCD Source Driver Circuit | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 賴飛羆,林浩雄,蘇哿暐 | |
| dc.subject.keyword | 絕熱邏輯電路,液晶顯示器驅動電路, | zh_TW |
| dc.subject.keyword | Adiabatic Logic Circuit,LCD Driver Circuit, | en |
| dc.relation.page | 58 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2005-07-13 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| Appears in Collections: | 電子工程學研究所 | |
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| File | Size | Format | |
|---|---|---|---|
| ntu-94-1.pdf Restricted Access | 1.92 MB | Adobe PDF |
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