請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/3686
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 王暉 | |
dc.contributor.author | Kuang-Sheng Yeh | en |
dc.contributor.author | 葉光聖 | zh_TW |
dc.date.accessioned | 2021-05-13T08:35:57Z | - |
dc.date.available | 2019-08-26 | |
dc.date.available | 2021-05-13T08:35:57Z | - |
dc.date.copyright | 2016-08-26 | |
dc.date.issued | 2016 | |
dc.date.submitted | 2016-08-18 | |
dc.identifier.citation | [1] J. L. Kuo et al., “60-GHz four-element phased-array transmit/receive system-in-package using phase compensation techniques in 65-nm flip-chip CMOS process,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 3, pp. 743-756, March 2012
[2] S. Zihir, O. D. Gurbuz, A. Karroy, S. Raman and G. M. Rebeiz, “A 60 GHz single-chip 256-element wafer-scale phased array with EIRP of 45 dBm using sub-reticle stitching,” in Radio Frequency Integrated Circuits Symposium (RFIC), 2015, pp. 23-26 [3] E. Cohen, M. Ruberto, M. Cohen, O. Degani, S. Ravid and D. Ritter, “A CMOS bidirectional 32-element phased-array transceiver at 60 GHz with LTCC antenna,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1359-1375, March 2013 [4] J. Kim and J. F. Buckwalter, “A switchless, Q-band bidirectional transceiver in 0.12-μm SiGe BiCMOS technology,” IEEE Journal of Solid-State Circuits, vol. 47, no. 2, pp. 368-380, Feb. 2012 [5] C. Liu et al., “A fully integrated X-band phased-array transceiver in 0.13-μm SiGe BiCMOS technology,” IEEE Transactions on Microwave Theory and Techniques, vol. 64, no. 2, pp. 575-584, Feb. 2016. [6] R. J. Drost and B. A. Wooley, “An 8-Gb/s/pin simultaneously bidirectional transceiver in 0.35-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 39, no. 11, pp. 1894-1908, Nov. 2004 [7] W. E. Vice, A. J. Brodersen and G. J. Lipovski, “On integrated circuit bidirectional amplifiers,” IEEE Journal of Solid-State Circuits, vol. 8, no. 5, pp. 381-388, Oct 1973 [8] P. Hasler, B. A. Minch and C. Diorio, “An autozeroing floating-gate amplifier,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 48, no. 1, pp. 74-82, Jan. 2001 [9] H. S. Wu, C. W. Wang and C. K. C. Tzuang, “CMOS active quasi-circulator with dual transmission gains incorporating feedforward technique at K-Band,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 8, pp. 2084-2091, Aug. 2010 [10] S. H. Hung, Y. C. Lee, C. C. Su and Y. H. Wang, “High-isolation millimeter-wave subharmonic monolithic mixer with modified quasi-circulator,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1140-1149, March 2013 [11] J. F. Chang, J. C. Kao, Y. H. Lin and H. Wang, “Design and analysis of 24-GHz active isolator and quasi-circulator,” IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 8, pp. 2638-2649, Aug. 2015 [12] Shyh-Jong Chung, Shing-Ming Chen and Yang-Chang Lee, “A novel bi-directional amplifier with applications in active Van Atta retrodirective arrays, ” IEEE Transactions on Microwave Theory and Techniques, vol. 51, no. 2, pp. 542-547, Feb. 2003. [13] E. Cohen, S. Ravid and D. Ritter, “Design consideration of a 5 stage bidirectional single ended LNA PA in 60GHz,” in IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems (COMCAS), Tel Aviv, 2011, pp. 1-4. [14] D. W. Kang, J. G. Kim, B. W. Min and G. M. Rebeiz, “Single and four-element Ka-band transmit/receive phased-array silicon RFICs with 5-bit amplitude and phase control,” IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 12, pp. 3534-3543, Dec. 2009 [15] S. Masuda et al., “GaN single-chip transceiver frontend MMIC for X-band applications,” in IEEE MTT-S International Microwave Symposium Digest, 2012, pp. 1-3 [16] Shou-Hsien Weng, Hong-Yeh Chang, Pei-Si Wu and Yu-Chi Wang, “A Ka-band monolithic bidirectional up-down converter for high-speed applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 3, pp. 610-622, March 2014 [17] M. Uzunkol and G. Rebeiz, “A low-loss 50–70 GHz SPDT switch in 90 nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 45, no. 10, pp. 2003-2007, Oct. 2010 [18] J. He, Y. Z. Xiong and Y. P. Zhang, “Analysis and design of 60-GHz SPDT switch in 130-nm CMOS,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 10, pp. 3113-3119, Oct. 2012 [19] J. W. Archer, O. Sevimli and R. A. Batchelor, “Bi-directional amplifiers for half-duplex transceivers,” in IEEE GaAs IC Symposium, 1999, pp. 251-254 [20] J. M. Yang et al., “Compact Ka-band bi-directional amplifier for low-cost electronic scanning array antenna,” IEEE Journal of Solid-State Circuits, vol. 39, no. 10, pp. 1716-1719, Oct. 2004 [21] S. Shiba et al., “F-band bidirectional amplifier using 75-nm InP HEMTs,” in Compound Semiconductor Integrated Circuit Symposium (CSICS), 2012, pp. 1-4 [22] P. J. Peng, C. Kao, C. Y. Wu and J. Lee, “A 79-GHz bidirectional pulse radar system with injection-regenerative receiver in 65 nm CMOS,” in IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, 2014, pp. 303-306. [23] T. Kijsanayotin, Jun Li and J. F. Buckwalter, “A 70 GHz bidirectional front-end for a half-duplex transceiver in 90-nm SiGe BiCMOS,” in IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2015, pp. 1-4 [24] C. S. Yu, K. T. Mok, W. S. Chan and S. W. Leung, “Switchless bi-directional amplifier,” in IEEE Asia Pacific Microwave Conference, 2006, pp. 476-479 [25] S. Afroz and Kwang-Jin Koh, “94 GHz bidirectional variable gain amplifier in 0.13-µm SiGe BiCMOS for phased array transmit and receive (T/R) applications,” in IEEE MTT-S International Microwave Symposium (IMS), 2015, pp. 1-3 [26] Moon-Kyu Cho, Jeong-Geun Kim and Donghyun Baek, “A switchless CMOS bi-directional distributed gain amplifier with multi-octave bandwidth,” IEEE Microwave and Wireless Components Letters, vol. 23, no. 11, pp. 611-613, Nov. 2013 [27] D. Kim, D. H. Lee, S. Sim, L. Jeon and S. Hong, “An X-band switchless bidirectional GaN MMIC amplifier for phased array systems,” IEEE Microwave and Wireless Components Letters, vol. 24, no. 12, pp. 878-880, Dec. 2014 [28] P. Chen, P. C. Huang, J. J. Kuo and H. Wang, “A 22–31 GHz distributed amplifier based on high-pass transmission lines using 0.18 µm CMOS technology,” IEEE Microwave and Wireless Components Letters, vol. 21, no. 3, pp. 160-162, March 2011 [29] J. Kim, M. Parlak and J. F. Buckwalter, “A 77-GHz to 90-GHz bidirectional amplifier for half-duplex front-ends,” in Custom Integrated Circuits Conference (CICC), 2010 IEEE, San Jose, CA, 2010, pp. 1-4 [30] T. Kijsanayotin and J. F. Buckwalter, “Millimeter-wave dual-band, bidirectional amplifier and active circulator in a CMOS SOI process,” IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 12, pp. 3028-3040, Dec. 2014 [31] J. F. Buckwalter and J. Kim, “Cascaded constructive wave amplification,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 3, pp. 506-517, March 2010 [32] K. Wang, M. Jones and S. Nelson, “The S-probe-a new, cost-effective, 4-gamma method for evaluating multi-stage amplifier stability, ” Microwave Symposium Digest, 1992., IEEE MTT-S International, Albuquerque, NM, USA, 1992, pp. 829-832 vol.2. [33] W. L. Chan and J. R. Long, “A 58–65 GHz neutralized CMOS power amplifier With PAE above 10% at 1-V supply,” IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp. 554-564, March 2010 [34] Q. J. Gu, Z. Xu and M. C. F. Chang, “Two-way current-combining W-band power amplifier in 65-nm CMOS,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 5, pp. 1365-1374, May 2012 [35] M. Thian, M. Tiebout, N. B. Buchanan, V. F. Fusco and F. Dielacher, “A 76–84 GHz SiGe power amplifier array employing low-loss four-way differential combining transformer,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 2, pp. 931-938, Feb. 2013 [36] Hao-Shun Yang, Jau-Horng Chen and Y. J. E. Chen, “A wideband and highly symmetric multi-Port parallel combining transformer technology,” IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 11, pp. 3671-3680, Nov. 2015 [37] J. Kim et al., “A fully-integrated high-power linear CMOS power amplifier with a parallel-series combining transformer,” IEEE Journal of Solid-State Circuits, vol. 47, no. 3, pp. 599-614, March 2012 [38] W. Tai et al., “A transformer-combined 31.5 dBm outphasing power amplifier in 45 nm LP CMOS with dynamic power control for back-off power efficiency enhancement,” IEEE Journal of Solid-State Circuits, vol. 47, no. 7, pp. 1646-1658, July 2012 [39] M. Bassi, J. Zhao, A. Bevilacqua, A. Ghilioni, A. Mazzanti and F. Svelto, “A 40–67 GHz power amplifier with 13 dBm Psat and 16% PAE in 28 nm CMOS LP,” IEEE Journal of Solid-State Circuits, vol. 50, no. 7, pp. 1618-1628, July 2015 [40] T. LaRocca, J. Y. C. Liu and M. C. F. Chang, “60 GHz CMOS amplifiers using transformer-coupling and artificial dielectric differential transmission lines for compact design,” IEEE Journal of Solid-State Circuits, vol. 44, no. 5, pp. 1425-1435, May 2009. [41] I. Cendoya, J. de No, B. Sedano, A. Garcia-Alonso, D. Valderas and I. Gutierrez, “A new methodology for the on-Wafer characterization of RF integrated transformers,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, no. 5, pp. 1046-1053, May 2007 [42] IEEE Standard for Information technology--Telecommunications and information exchange between systems--Local and metropolitan area networks--Specific requirements-Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications Amendment 3: Enhancements for Very High Throughput in the 60 GHz Band,' in IEEE Std 802.11ad-2012 (Amendment to IEEE Std 802.11-2012, as amended by IEEE Std 802.11ae-2012 and IEEE Std 802.11aa-2012) , Dec. 28 2012, pp.1-628 [43] Agilent. Wireless LAN at 60 GHz - IEEE 802.11ad Explained [Online]. Available: http://cp.literature.agilent.com/litweb/pdf/5990-9697EN.pdf. [44] ABI research. 802.11ad Will Vastly Enhance Wi-Fi: The Importance of the 60 GHz Band to Wi-Fi’s Continued Evolution [Online]. Available: https://www.qualcomm. com/media/documents/files/abi-research-802-11ad-will-vastly-enhance-wi-fi-.pdf. [45] P. J. Peng, J. C. Kao and H. Wang, “A 57-66 GHz vector sum phase shifter with low phase/amplitude error using a Wilkinson power divider with LHTL/RHTL elements,” in IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), Waikoloa, HI, 2011, pp. 1-4. [46] W. T. Li, Y. C. Chiang, J. H. Tsai, H. Y. Yang, J. H. Cheng and T. W. Huang, “60-GHz 5-bit phase shifter with integrated VGA phase-error compensation,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 3, pp. 1224-1235, March 2013. [47] J. Butler and R. Lowe, “Beam forming matrix simplifies design of electronically scanned antennas,” IEEE Transactions on Applied Superconductivity, vol. 9, pp. 170–173, Apr. 1961 [48] Yuli K. Ningsih, M. Asvial, and E. T. Rahardjo, “Design and analysis of wideband nonuniform branch line coupler and its application in a wideband Butler matrix,” in International Journal of Antennas and Propagation, 2012, pp. 1. [49] [Online]. Available: https://en.wikipedia.org/wiki/Bit_error_rate [50] A. Hajimiri, H. Hashemi, A. Natarajan, Xiang Guan and A. Komijani, “Integrated Phased Array Systems in Silicon,” Proceedings of the IEEE, vol. 93, no. 9, pp. 1637-1655, Sept. 2005. [51] David M. Pozar, Microwave and Rf Design of Wireless Systems, Wiley Publishing, 2000 [52] John G. Proakis, Digital Communications 5th edition, McGraw-Hill, 2007 [53] S. Liao, P. Chen, P. Wu, K. M. Shum and Q. Xue, “Substrate-integrated waveguide-based 60-GHz resonant slotted waveguide arrays with wide impedance bandwidth and high gain,” IEEE Transactions on Antennas and Propagation, vol. 63, no. 7, pp. 2922-2931, July 2015. [54] H. T. Friis, “A note on a simple transmission formula,” in Proceedings of the IRE, vol. 34, no. 5, pp. 254-256, May 1946. [55] A. Valdes-Garcia et al., “A fully integrated 16-element phased-array transmitter in SiGe BiCMOS for 60-GHz communications,” IEEE Journal of Solid-State Circuits, vol. 45, no. 12, pp. 2757-2773, Dec. 2010. [56] T. H. Lin, S. K. Hsu and T. L. Wu, “Bandwidth enhancement of 4×4 Butler matrix using broadband forward-wave directional coupler and phase difference compensation,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 12, pp. 4099-4109, Dec. 2013. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/3686 | - |
dc.description.abstract | 本論文的研究主題為無開關雙向放大器與其在雙向波束成型系統的應用。論文首先說明雙向傳輸系統在通訊系統中的優勢,在雙向傳輸系統中,最關鍵的元件為雙向放大器。傳統的雙向放大器需要使用兩個單獨的放大器與開關來實現,然而多餘的開關會造成額外的損耗與占用面積。本論文提出兩個使用無開關架構的雙向放大器與一個雙向波束成型器晶片,藉由無開關與雙向的設計,降低訊號的損耗與晶片面積。
第一個雙向放大器實現在90奈米金氧半場效電晶體製程。在應用頻帶57-66 GHz內,接收模式的增益大於18.2 dB,雜訊指數小於8 dB,直流功耗為15.3 mW。在發射模式下,線性增益大於13.5 dB,直流功耗為46 mW。在60 GHz時,1 dB增益壓縮時的輸出功率為3.6 dBm,飽和輸出功率為6.5 dBm,最大附加功率效率為7.3%。整體電路佈局面積為0.44平方毫米。第二個雙向放大器實現在40奈米金氧半場效電晶體低功耗製程。在應用頻帶52-62 GHz內,接收模式的小訊號增益大於10.1 dB,雜訊指數小於8 dB,直流功耗為22.3 mW。在發射模式下,線性增益大於13.4 dB,直流功耗為49.5 mW。在55 GHz時,1 dB增益壓縮時的輸出功率為2.7 dBm,飽和輸出功率為9.7 dBm,最大附加功率效率為8.5%。整體電路佈局面積為0.21平方毫米。比起第一個雙向放大器,此電路使用差動架構降低了對旁路電容的面積需求,與使用變壓器實現了小面積的匹配網路,晶片面積可以更進一步地縮小。此外,因使用差動放大器與變壓器功率結合,輸出的功率與附加功率效率也能進一步地提升。比起已發表的文獻,本論文提出的兩個無開關雙向放大器為首次使用矽基製程實現在60 GHz的應用。其中40奈米版本的雙向放大器更具有最小的晶片面積。 藉由使用40奈米的雙向放大器,我們實現了一個可應用在手持裝置的雙向傳輸波束成型器晶片。藉由與四個獨立的四單元天線陣列搭配,此晶片可將收發機的訊號傳送至(接收從)選定的16個波束方向,以達到全向收發的功能。藉由雙向架構,此晶片上的所有被動元件與輸入輸出埠在傳送與接收模式皆可共用。此外,也因為40奈米版本的雙向放大器有相當小的晶片面積,此控制晶片可以縮小到2.9平方毫米。此晶片使用金氧半場效電晶體製程,避免了異質晶片的整合;而縮小化的電路面積能有效改善在大數量相位陣列中,過大的輸入輸出連接數造成封裝的困難。 | zh_TW |
dc.description.abstract | The research topics of this thesis are switchless bidirectional amplifier (BDA) and its application in the bidirectional beamforming system. First, the advantages of bidirectional system in the communication are illustrated. In the bidirectional system, the most critical component is the BDA. Conventional BDAs are realized by two unidirectional amplifiers with switches. However, the switches produce extra loss and occupy large chip area. This thesis presents two switchless BDAs and a beamformer which built by the BDAs. By using the switchless topology, the loss and the chip size are minimized.
The first BDA is realized in 90-nm CMOS process. From 57 to 66 GHz, in receiving mode, the gain is above 18.2 dB and the noise figure is below 8 dB, with 15.3 mW power consumption. In transmitting mode, the linear gain is above 13.5 dB with 46 mW power consumption. At 60 GHz, output 1 dB compression point (OP1dB) is 3.6 dBm, saturation output power (Psat) is 6.5 dBm with peak PAE of 7.3%. The chip size is 0.44 mm square. The second BDA is realized in 40-nm low power CMOS process, with the transformer-coupled matching network and neutralization technique. From 52 to 62 GHz, in receiving mode, the gain is above 10.1 dB and the noise figure (NF) is below 8 dB, with 22.3 mW power consumption. In transmitting mode, the linear gain is above 13.4 dB, with 49.5 mW power consumption. At 55 GHz, the output 1 dB compression point (OP1dB) is 2.7 dBm, saturation output power (Psat) is 9.7 dBm with peak PAE of 8.5%. The chip size is 0.21 mm square. Comparing with the first BDA, the chip size is reduced due to elimination of bypass capacitors in differential topology, and compact transformers as the matching networks. In addition, the output power and PAE are enhanced by using the differential power combining. Comparing with published works, the two BDAs are the first switchless BDA realized on Si-based process for 60 GHz application, and the 40-nm BDA demonstrate the minimum chip size. By using the 40-nm BDA, a bidirectional beamformer which applied in the high speed communication of the mobile devices is designed. Incorporated with four separated 4-element (4×4) antenna arrays, the beamformer supports 16-beam directions. By using the bidirectional architecture, all the passive components and I/O are shared in the transmitting and the receiving paths to minimize the chip size. Moreover, due to the compact size of the BDAs, the system chip is compact as 2.9 mm square. With the CMOS process and the minimized circuit size in the large-scale phased array, the reliability issue in high I/O connected package and heterogeneous integration can be solved. | en |
dc.description.provenance | Made available in DSpace on 2021-05-13T08:35:57Z (GMT). No. of bitstreams: 1 ntu-105-R00942125-1.pdf: 24452391 bytes, checksum: eba462eb966e825667e29557bbe5ac31 (MD5) Previous issue date: 2016 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iv CONTENTS vi LIST OF FIGURES x LIST OF TABLES xxii Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 4 1.3 Contributions 12 1.4 Thesis Organization 13 Chapter 2 Design of a 60-GHz Bidirectional Amplifier in 90-nm CMOS process 14 2.1 Circuit Design 14 2.1.1 Introduction 14 2.1.2 PA part 16 2.1.3 LNA part 18 2.2 I/O Junction Network 20 2.3 Layout and Simulated Performance 27 2.4 Stability Analysis 30 2.5 Experiment results 35 2.6 Summary 41 Chapter 3 Design of a 60-GHz Bidirectional Amplifier in 40-nm CMOS with Transformer-Coupled and Neutralization Technique 43 3.1 Introduction 43 3.2 Circuit Design 44 3.2.1 PA part 46 3.2.2 LNA part 50 3.3 Transformer Design 52 3.3.1 Introduction 52 3.3.2 Inter-stage Transformer 59 3.3.3 I/O Junction Transformer 63 3.4 Chip Layout and Simulation Performance 70 3.5 Stability Analysis 73 3.6 Experiment Results 76 3.7 Discussion 81 3.7.1 Performance Comparison 81 3.7.2 Measurement of test devices 85 3.7.3 Revised Model 88 3.7.4 Revised Simulation 90 3.8 Summary 94 Chapter 4 Design of 60-GHz Bidirectional Beamformer in 40-nm CMOS Process 96 4.1 System plan 96 4.1.1 Application 96 4.1.2 Approach 98 4.1.3 System architecture 100 4.1.4 Beamforming control 101 4.1.5 System Link budget 103 4.1.6 Digital Control 109 4.2 Implementation of Functional Blocks 110 4.2.1 Butler Matrix 110 4.2.2 Absorptive SPQT switch 115 4.2.3 SPDT switch 118 4.2.4 Bidirectional Amplifier 123 4.2.5 Bias circuit 125 4.2.6 Digital circuit 126 4.3 Beam forming system 131 4.3.1 System design 131 4.3.2 Layout and I/O arrangement 133 4.3.3 Control Plan 135 4.4 Simulated results 139 4.4.1 Introduction 139 4.4.2 Beam control simulation at Rx mode 140 4.4.3 Beam control simulation at Tx mode 157 4.4.4 Discussion 174 4.5 Experiment results 177 4.5.1 Measurement setup 177 4.5.2 Digital control testing 178 4.5.3 Beam control testing results at Rx mode 179 4.5.4 Beam control testing results at Tx mode 197 4.6 Revised system design 214 4.6.1 Revised I/O pads 214 4.6.2 Voltage level-up shifter 215 4.6.3 ESD protection for digital circuit 216 4.6.4 Revised BDA 217 4.6.5 New bias plan 222 4.6.6 Layout and pin definition 224 4.7 Summary 226 Chapter 5 Conclusions 227 REFERENCE 228 | |
dc.language.iso | en | |
dc.title | 應用於60 GHz之雙向傳輸波束成型器與無開關雙向放大器之設計 | zh_TW |
dc.title | Design of 60 GHz Bidirectional Beamformer and Switchless Bidirectional Amplifier | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 林坤佑,盧信嘉,黃天偉,章朝盛 | |
dc.subject.keyword | 雙向放大器,雙向收發機,相位陣列,波束成型,金氧半場效電晶體,60 GHz, | zh_TW |
dc.subject.keyword | bidirectional amplifier,bidirectional transceiver,beamforming,phased array,CMOS,60 GHz, | en |
dc.relation.page | 235 | |
dc.identifier.doi | 10.6342/NTU201603106 | |
dc.rights.note | 同意授權(全球公開) | |
dc.date.accepted | 2016-08-19 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-105-1.pdf | 23.88 MB | Adobe PDF | 檢視/開啟 |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。