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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 郭正邦 | |
| dc.contributor.author | Song-Jun Lin | en |
| dc.contributor.author | 林嵩鈞 | zh_TW |
| dc.date.accessioned | 2021-06-13T07:58:40Z | - |
| dc.date.available | 2005-07-30 | |
| dc.date.copyright | 2005-07-30 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-22 | |
| dc.identifier.citation | 參考文獻
References 第一章 [1.1] John R. F. McMacken, Member, IEEE, and Savvas G. Chamberlain, Fellow, IEEE, “A Numerical Model for Two-Dimensional Transient Simulation of Amorphous Silicon Thin-Film Transistors” IEEE Transactions on computer-aided design, Vol. 11, No. 5, pp.629-639, May 1992 [1.2] J. S. Huang and C. H. Wu, “Two-Dimensional Calculation of Transient Terminal Currents in Amorphous Silicon Thin-Film Transistors” Department of Electrical Engineering, University of Missouri-Rolla, Rolla, pp.21-24, MO 65401. [1.3] John Y. W. Seto, “The electrical properties of polycrystalline silicon films” Journal of Applied Physics, Vol. 46, No. 12, pp.5247-5257, December 1975. [1.4] Anish Kumar K. P. and Johnny K. O. Sin, “A Simple Polysilicon TFT Technology for Display Systems on Glass” IEDM, pp.515-518, 97. [1.5] Chien Kuo Yang, Tqan Fu Lei, and Chung Len Lee, Senior Member, IEEE, “Characteristics of Top-Gate Thin-Film Transistors Fabricated on Nitrogen-Implanted Polysilicon Films” IEEE Transactions on electron devices, Vol. 42, No. 12, pp.2163-2169, December 1995. [1.6] Olasupo, K. R. and Hatalis, M. K. “Leakage current mechanism in sub-micron polysilicon thin-film transistors” Electron Devices, IEEE Transactions on Volume 43, Issue 8, pp.1218 – 1223, Aug. 1996. [1.7] Dimitriadis, C. A. and Coxon, P. A. and Economou, N. A. “Leakage current of undoped LPCVD polycrystalline silicon thin-film transistors” Electron Devices, IEEE Transactions on Volume 42, Issue 5, pp.950 – 956, May 1995. [1.8] French, P. J. and Van Drieenhuizen, B. P. and Poenar, D. and Goosen, J. F. L. and Mallee, R. and Sarro, P. M. and Wolffenbuttel, R. F. “The development of a low-stress polysilicon process compatible with standard device processing” Microelectromechanical Systems, Journal of Volume 5, Issue 3, Sept.1996 Page(s):187 – 196. [1.9] Ahmed, K. ; Ibok, E. ; Yeap, G. C. F.; Qi Xiang ; Ogle, B. ; Wortman, J. J.; Hauser, J. R. “Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFETs” Electron Devices, IEEE Transactions on Volume 46, Issue 8, Aug. 1999, Page(s):1650 – 1655. [1.10] Kwon-Young Choi; Min-Koo Han; “A novel gate-overlapped LDD poly-Si thin-film transistor” Electron Device Letters, IEEE Volume 17, Issue 12, Dec. 1996 Page(s):566 – 568. [1.11] BonFiglietti, A.; Cuscuna, M.; Valletta, A.; Mariucci, L.; Pecora, A.; Fortunato, G.; Brotherton, S.D.; Ayres, J.R.; “Analysis of electrical characteristics of gate overlapped lightly doped drain (GOLDD) polysilicon thin-film transistors with different LDD doping concentration” Electron Devices, IEEE Transactions on Volume 50, Issue 12, Dec. 2003, Page(s):2425 – 2433. 第二章 [2.1] Taeyul Choi; Hwang, D.J.; Hatano, M.; Grigoropoulos, C.P.; “Ultra-fast laser-induced recrystallization of amorphous silicon films” Lasers and Electro-Optics, 2001. CLEO '01. Technical Digest. Summaries of papers presented at the Conference on 6-11 May 2001 Page(s):231 – 232. [2.2] Valdinoci, M.; Colalongo, L.; Baccarani, G.; Fortunato, G.; Pecora, A.; Policicchio, I.; “Floating body effects in polysilicon thin-film transistors” Electron Devices, IEEE Transactions on Volume 44, Issue 12, Dec. 1997 Page(s):2234 – 2241. [2.3] Gi-Young Yang; Sung-Hoi Hur; Chul-Hi Han; “physical-based analytical turn-on model of polysilicon thin-film transistors for circuit simulation” Electron Devices, IEEE Transactions on Volume 46, Issue 1, Jan. 1999 Page(s):165 – 172. [2.4] Maeda, S.; Kuriyama, H.; Ipposhi, T.; Maegawa, S.; Inuishi, M.; “An artificial fingerprint device (AFD) module using poly-Si thin film transistors with logic LSI compatible process for built-in security” Electron Devices Meeting, 2001. IEDM Technical Digest. International 2-5 Dec. 2001 Page(s):34.5.1 - 34.5.4. [2.5] Mariucci, L.; Fortunato, G.; BonFiglietti, A.; Cuscuna, M.; Pecora, A.; Valletta, A.; “Polysilicon TFT structures for kink-effect suppression” Electron Devices, IEEE Transactions on Volume 51, Issue 7, July 2004 Page(s):1135 – 1142. [2.6] Yamauchi, N.; Hajjar, J.-J.J.; Reif, R.; “Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film” Electron Devices, IEEE Transactions on Volume 38, Issue 1, Jan. 1991 Page(s):55 – 60. [2.7] Yamauchi, N.; Kakuda, N.; Hisaki, T.; “Characteristics of high mobility polysilicon thin-film transistors using very thin sputter-deposited SiO2 films” Electron Devices, IEEE Transactions on Volume 41, Issue 10, Oct. 1994 Page(s):1882 – 1885. [2.8] Ono, K.; Aoyama, T.; Konishi, N.; Miyata, K.; “Analysis of current voltage characteristics of low-temperature-processed polysilicon thin-film transistors” Electron Devices, IEEE Transactions on Volume 39, Issue 4, April 1992 Page(s):792 – 802. [2.9] Ayres, J.P.; “Characterisation of trapping states in poly-Si thin film transistors” Poly-Si Devices and Applications, IEE Colloquium on 23-24 Mar 1993 Page(s):7/1 - 7/4. [2.10] Xiao-Yu Li; Brozek, T.; Aum, P.; Chan, D.; Viswanathan, C.R.; “egraded CMOS hot carrier life time-role of plasma etching induced charging damage and edge damage；Reliability Physics Symposium, 1995. 33rd Annual Proceedings., IEEE International 4-6 April 1995 Page(s):260 – 265. [2.11] Kouvatsos, D.N.; Voutsas, A.T.; Hatalis, M.K.; “High-performance thin-film transistors in large grain size polysilicon deposited by thermal decomposition of disilane” Electron Devices, IEEE Transactions on Volume 43, Issue 9, Sept. 1996 Page(s):1399 – 1406. 第三章 [3.1] Ching-Fa Yeh; Shyue-Shyh Lin; Tzung-Zu Yang; Chun-Lin Chen; Yu-Chi Yang; “Performance and off-state current mechanisms of low-temperature processed polysilicon thin-film transistors with liquid phase deposited SiO2 gate” Electron Devices, IEEE Transactions on Volume 41, Issue 2, Feb. 1994 Page(s):173 – 179. [3.2] Hack, M.; Wu, I.; Lewis, A.G.; King, T.J.; “Numerical simulations of on and off state characteristics of poly-siliconthin film transistors” Device Research Conference, 1993. 51st Annual June 21-23, 1993 Page(s):105 – 106. [3.3] Koyanagi, M.; Kurino, H.; Hashimoto, T.; Mori, H.; Hata, K.; Hiruma, Y.; Fujimori, T.; Wu, I.-W.; Lewis, A.G.; “Relation between hot-carrier light emission and kink effect in poly-Si thin film transistors” Electron Devices Meeting, 1991. Technical Digest., International 8-11 Dec. 1991 Page(s):571 – 574. [3.4] Farmakis, F.V.; Brini, J.; Kamarinos, G.; Angelis, C.T.; Dimitriadis, C.A.; Miyasaka, M.; “On-current modeling of large-grain polycrystalline silicon thin-film transistors” Electron Devices, IEEE Transactions on Volume 48, Issue 4, April 2001 Page(s):701 – 706. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/36375 | - |
| dc.description.abstract | 本論文中提出了低溫多晶矽薄膜電晶體的電流突增效應(Kink Effect)之DC直流與AC交流分析。
第一章對於顯示器技術將來以及現在之趨勢，簡單介紹低溫多晶矽薄膜電晶體元件結構以及電流突增效應。 第二章提出一個可供電路模擬之用，以物理基準的低溫多晶矽薄膜電晶體電流分析模型。且利用製程元件模擬軟體為Tsuprem4，以及二維元件模擬軟體MEDICI來分析元件參數對DC直流的Kink Effect之影響。 第三章提出一個可供電路模擬之用，以物理基準的低溫多晶矽薄膜電晶體電容分析模型。同時分析元件參數對AC交流的Kink Effect之影響，討論電容變化與該效應之間的關連性。 | zh_TW |
| dc.description.abstract | Abstract
Have proposed exchanging analysing in effect (Kink Effect ) DC direct current and AC that the electric current of the electric crystal of the low-temperature polycrystalline silicon membrane uprushes in this thesis. And present trend chapter one in the future to the technology of the display, the effect that introduce the electric crystal component structure and electric current of low-temperature polycrystalline silicon membrane and uprush briefly. Propose one can supply power way simulation spend , analyse models with physics basic low-temperature polycrystalline silicon membrane electric crystal electric current. Is it make Cheng component simulation software Tsuprem4 , and two-dimentional component simulation software MEDICI is it analyse component parameter to influence of Kink Effect , DC of direct current to come to utilize. Propose one can supply power way simulation spend, analyse models with the electric electric capacity of crystal of low-temperature polycrystalline silicon membrane with basic physics. Analysing the influence of Kink Effect that the parameter of the component is exchanged to AC at the same time, the ones that discusses the connecting with between electric capacity change and this effect are closed. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T07:58:40Z (GMT). No. of bitstreams: 1 ntu-94-R92943122-1.pdf: 633944 bytes, checksum: 48fc151e153a9171bf91f5d4aa4f7bed (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | 目錄
第一章 導論 1.1 平面顯示器之市場趨勢 1 1.2 LTPS薄膜電晶體之特性與結構 3 1.3 LTPS薄膜電晶體之五道光罩製造流程 6 1.4 LTPS薄膜電晶體電流特性與Kink Effect 8 1.5 目標 12 第二章 低溫多晶矽薄膜電晶體元件電流突增之直流分析 2.1 簡介 14 2.2 電流特性 15 2.3 模擬討論 20 2.3.1 閘極電壓 參數變動 21 2.3.2 晶粒邊界陷阱濃度 參數變動 22 2.3.3 載子生命期 參數變動 23 2.3.4 晶粒尺寸 參數變動 24 2.3.5 溫度 參數變動 26 2.3.6 薄膜厚度Thin Film Thickness參數變動 28 2.4 結論 29 第三章 低溫多晶矽薄膜電晶體元件電流突增之交流分析多晶矽 3.1 簡介 31 3.2 電容特性 31 3.3 模擬討論 34 3.3.1 閘極電壓 參數變動 35 3.3.2 晶粒邊界陷阱濃度 參數變動 36 3.3.3 載子生命期 參數變動 37 3.3.4 晶粒尺寸 參數變動 38 3.3.5 溫度 參數變動 40 3.3.6 薄膜厚度Thin Film Thickness參數變動 41 3.4 結論 42 第四章 總結 總結 43 參考文獻 參考文獻 46 | |
| dc.language.iso | zh-TW | |
| dc.subject | 低溫多晶矽薄膜電晶體 | zh_TW |
| dc.subject | Polysilicon thin film transistor Devices | en |
| dc.title | 低溫多晶矽薄膜電晶體元件電容特性之分析 | zh_TW |
| dc.title | Analysis of Capacitance Behavior in Polysilicon thin film transistor Devices simulation | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林浩雄,蘇哿暐,賴飛羆,王維新 | |
| dc.subject.keyword | 低溫多晶矽薄膜電晶體, | zh_TW |
| dc.subject.keyword | Polysilicon thin film transistor Devices, | en |
| dc.relation.page | 50 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2005-07-23 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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