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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 郭正邦 | |
| dc.contributor.author | Guan-Yu Liu | en |
| dc.contributor.author | 劉冠佑 | zh_TW |
| dc.date.accessioned | 2021-06-13T07:57:59Z | - |
| dc.date.available | 2005-07-27 | |
| dc.date.copyright | 2005-07-27 | |
| dc.date.issued | 2005 | |
| dc.date.submitted | 2005-07-23 | |
| dc.identifier.citation | 第1章
[1.1] stanford.edu/group/chart/PowerDensity [1.2] A. P. Chandrakasan, S. Sheng and R. W. Brodersen, “Low-power CMOS digital design,” IEEE J. Solid-State Circuits., vol. 27, no. 4, Apr, 1992. [1.3] C. Svensson and A. Alvandpour, “Low power and low volatage CMOS digital circuit techniques,” in Proc. Low Power Electronics and Design, pp7-10, 1998. [1.4] Alain Guyot and Selim Abou-Samra,”Low power CMOS Ditital Design,” in Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on , pp. IP6- I13, 1998. [1.5] IEEE International Solid-State Circuits Conference (ISSCC). [1.6] P. K. Vasudev and P. M. Zeitzoff, 'Si-ULSI with a scaled-down future:Trends and challenges for ULSI semiconductor technology in thecoming decade,' IEEE Circuits and Devices Magazine, vol. 14, no. 3, pp.19-29, 1998. [1.7] J. E. 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Denker, “A review of adiabatic computing,” in Proc. 1994 Symp. Low Power Electronics/Digest of Technical Papers, San Jose, CA, Oct. 1994, pp. 94-97. [2.4] W. C. Athas, L. J. Svensson, J. G. Koller, N. Tzartzanis, and Y. Chou, “Low-power digital systems based on adiabatic-switching principles,” IEEE Trans. Very Large Scale Integration Syst., vol. 2, PP. 398-406, Dec. 1994. [2.5] Y. Ye and K. Roy, “Energy recovery circuits using reversible and partially reversible logic,” IEEE Trans. On Circuits and Syst.Ⅰ, pp.769-778. Setp. 1996. [2.6] R. T. Hinman, M. F. Schlecht, 'Recovered energy logic a highly efficient alternative to today's logic circuits.' IEEE PESC, 1993 Record. [2.7] D, Maksimovic, 'A MOS Gate Drive with Resonant Transitions,' IEEE PESC, 1991 Record, pp. 527-532 [2.8] Y. Moon, D. K. Jeong, “An efficient charge recovery logic circuit,” IEEE J. Solid-State Circuits, vol. 31, pp. 514-522, Apr, 1996. [2.9] A. Kramer, J. S. Denker, B. flower, J. Mulrony, “2nd order adiabatic computation with 2N-2P and 2N-2N2P logic circuits,” in 1995 International Workshop on Low Power Design, Apr, 1995. [2.10]L. G. Heller, W. R. Griffin, “Cascode voltage switch logic: A differential CMOS logic family,” in ISSCC Dig. Tech. Papers, 1984, pp.16-17. [2.11]D. Maksimovic, V. G. Oklobdzija, B. Nikolic, K. W. Curent, “Clocked CMOS adiabatic logic with integrated single-phase power-clock supply”, IEEE Tran. VLSI Systems, vol. 8, pp. 460-463, no. 4, Aug., 2000. [2.12]D. Maksimovic, V. G. Oklobdzija, B. Nikolic, K. W. Curent, “Design and experimental verification of a CMOS adiabatic logic with single-phase power-clock supply,” Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on , Vol.1, 1997 [2.13] D. Maksimovic, V. G. Oklobdzija, B. Nikolic, K. W. Curent, “Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results,” in Proc. Low Power Electronics and Design, 1997 pp. 323 -327. [2.14] James B.Kuo, Jea-Hong Lou, 'Low-Voltage CMOS VLSI Circuits,' JOHN WILEY & SONS,INC. 1999 [2.15] J. H. Lou and J. B. Kuo, 'A 1.5-V Full-Swing Bootstrapped CMOS Large Capacitive-Load Driver Circuit Suitable for Low-Voltage CMOS VLSI,' IEEE J. Sol. St.Ckts, 28(4), 408-414(1993) [2.16] Chen, P.C.; Kuo, J.B.; 'Sub-1 V CMOS large capacitive-load driver circuit using direct bootstrap technique for low-voltage CMOS VLSI ' Electronics Letters Volume 38, Issue 6, 14 March 2002 Page(s):265 - 266 第3章 [3.1] T. Itakura, H. Minamizaki, T. Saito, T. Kuroda, “A 402-output TFT-LCD Driver IC with Power Control Based on the Number of Color Selected,” IEEE J. Solid-State Circuits, Vol. 38, No. 3, pp. 503-510, March 2003. [3.2] C. F. Law, K. S. Yeo, and R. S. Samir, “Sub-1V Bootstrapped CMOS Driver for Giga-Scale-Integration Era,” Elec. Lett., Vol. 35, No. 5, pp. 392-393, 1999. [3.3] K. S. Yeo, J. G. Ma, M. A. Do, “Ultra-Low-Voltage Bootstrapped CMOS Driver for High Performance Applications,” Elec. Lett., Vol. 36, No. 8, pp. 706-707, 2000. [3.4] J. H. Lou and J. B. Kuo, “A 1.5V Full-Swing Bootstrapped CMOS Large Capacitive-Load Driver Circuit Suitable for Low-Voltage CMOS VLSI,” IEEE J. Solid-State Circuits, Vol. 32, No. 1, pp. 119-121, 1997. [3.5] Y. Zhang, H. H. Chen, and J. B. Kuo, “0.8V CMOS Adiabatic Differential Switch Logic Circuit Using Bootstrap Techniques for Low-Voltage Low-Power VLSI,” Elec. Lett., Vol. 38, No. 24, pp. 1497-1499, 2002. [3.6] H. P. Chen and J. B. Kuo, “A Low-Voltage CMOS Load Driver with the Adiabatic and Bootstrap Techniques for Low-Power System Applications,” MWSCAS Proc., Hiroshima, July 2004. 第4章 [4.1]Tetsuro Itakura,Hironori Minamizaki,Tetsuya Saito, Tadashi Kuroda 'A 402-Output TFT-LCD Driver IC with Power Control Based on the Number of Colors Selected'IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL. 38,NO. 3,MARCH 2003. [4.2] Tetsuro Itakura,Hironori Minamizaki,Tetsuya Saito, Tadashi Kuroda, Corporate Research and Development Center, Toshiba Corporation, Semiconductor Company, Toshiba Corporation 'A 402-Output TFT-LCD Driver IC with Power-Controlling Function Selecting Number of Colors' IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE [4.3] G. Y. LIU, N. C. WANG AND J. B. KUO, “ENERGY-EFFICIENT CMOS LARGE-LOAD DRIVER CIRCUIT WITH THE COMPLEMENTARY ADIABATIC/BOOTSTRAP (CAB) TECHNIQUE FOR LOW-POWER TFT-LCD SYSTEM APPLICATIONS” IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2005 [4.4 Neil H. E. Weste Kamran Eshraghian Principles of CMOS VLSI Design : A Systems Perspective 2/E | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/36353 | - |
| dc.description.abstract | 本論文提出ㄧ使用了互補式 絕熱/提升電容技術之有效率耗能的金氧半大負載驅動電路，並將之應用於薄膜電晶體液晶顯示器閘極驅動電路中。
第一章中將說明低電壓電路設計的趨勢和在低電壓操作下其優缺點。 第二章說明絕熱電路之原理，分析數個傳統多時脈，單一時脈絕熱電路家族和一般提升式驅動電路並說明其優劣。 第三章提出一個使用了互補式 絕熱/提升電容技術之有效率耗能的金氧半大負載驅動電路。經過HSPICE模擬後，與傳統的邏輯和驅動電路作效能比較，証明此電路在速度、功率回收與訊號的完整度上較原電路具有更好的表現。 第四章介紹薄膜電晶體液晶顯示器驅動電路原理並將第三章所提出之電路應用其中，並考量其電路佈局。 | zh_TW |
| dc.description.abstract | This thesis reports a new Energy-Efficient CMOS Large-Load Driver Circuit with the Complementary Adiabatic/Bootstrap (CAB) and use it in TFT-LCD gate driver circuit
In chapter 1, the trend of low voltage design, and its good and bad in recent years will be described In chapter 2, the principles of adiabatic technology will be described. Then several conventional adiabatic and bootstrapped driver circuit families are reviewed, and analyzed with discussion about the advantages and disadvantages. In chapter 3, new Energy-Efficient CMOS Large-Load Driver Circuit with the Complementary Adiabatic/Bootstrap (CAB) Technique are proposed. And by HSPICE simulation, it is proved that in speed ,power Consumption, have been improved to compare with conventional single path circuits. In chapter 4, introduce operation principle of TFT-LCD gate driver circuit and use (CAB) circuit in TFT-LCD gate driver circuit . | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T07:57:59Z (GMT). No. of bitstreams: 1 ntu-94-R92943128-1.pdf: 2264867 bytes, checksum: 7dc2a182c7ef81f3addb88d8f0ee96fb (MD5) Previous issue date: 2005 | en |
| dc.description.tableofcontents | 第1章 導論 1
1.1 低電壓低功率的趨勢 1 1.2 降低電壓操作的優點 3 1.3 降低操作電壓的缺點 6 1.4 適用於低電壓之電路架構 9 1.5 本論文目標 9 第2章 提升式非絕熱驅動電路與絕熱邏輯電路 11 2.1 絕熱電路原理 11 2.1.1 絕熱損耗 11 2.1.2 非絕熱損耗 15 2.1.3 結論 16 2.2 絕熱邏輯電路設計分析 17 2.2.1 功率時脈的產生 19 2.2.2 EEL、CAL、2N-2N2P絕熱邏輯電路 21 2.3 單一時脈絕熱邏輯驅動電路 25 2.3.1單一時脈絕熱邏輯電路運作 25 2.4 提升式驅動電路和工作理 27 2.4.1 提升式電路工作原理 27 2.4.2 傳統全幅提升式電路 29 2.4.3 直接提升式驅動電路 31 2.5 結論 32 第3章 應用於低功率薄膜電晶體液晶顯示器之有效率耗能金氧半大負載驅動電路使用互補式絕熱/提升式技術 34 3.1 有效率耗能之金氧半大負載驅動電路使用互補式絕熱 / 提升式技術 34 3.1.2 有效率耗能之金氧半大負載驅動電路使用互補式絕熱/提升式 技術之電路原理………………………………………...........35 3.2 有效率耗能之互補式金氧半大負載驅動電路使用互補式絕熱 / 提升式技術之電路效能評估 39 3.3 結論 42 第4章 液晶顯示器閘極驅動電路絕熱電路應用 44 4.1 薄膜電晶體液晶顯示器驅動方法及驅動電路架構 44 4.1.1 薄膜電晶體液晶顯示器驅動方法簡介 44 4.1.2 驅動電路架構及運作 45 4.2 薄膜電晶體液晶顯示器閘極驅動電路 46 4.2.1 閘極驅動電路基本系統架構 46 4.2.2 閘極驅動電路之電路運作 47 4.3 電路佈局 48 第5章 總結 58 參考文獻 第一章 ……………………………………………59 第二章……………………………………………..60 第三章……………………………………………..61 第四章……………………………………………..62 | |
| dc.language.iso | zh-TW | |
| dc.title | 閘極液晶顯示器驅動電路:絕熱電路應用 | zh_TW |
| dc.title | Gate Driver of TFT-LCD:Adiabatic Circuit Application | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 93-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蘇哿暐,林浩雄,王維新,賴飛羆 | |
| dc.subject.keyword | 閘極驅動電路,絕熱電路, | zh_TW |
| dc.subject.keyword | Gate Driver,Adiabatic Circuit, | en |
| dc.relation.page | 62 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2005-07-23 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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