請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/33949
標題: | 金氧半場效電晶體之電容行為及閘極穿遂電流模型分析 Modeling of MOSFET Devices : capacitance behavior analysis and gate tunneling current model |
作者: | Chia-Hung Lin 林家弘 |
指導教授: | 郭正邦 |
關鍵字: | 電容,穿遂電流, SOI,capacitance,tunneling, |
出版年 : | 2006 |
學位: | 碩士 |
摘要: | 本篇論文研究金氧半場效電晶體元件的電容行為和閘極穿遂電流模型。第一章簡介high-k材料的重要性。第二章考慮垂直及邊緣電通密度效應,模擬高介電係數閘極氧化層全解離絕緣體上矽互補式金氧半奈米元件之電容行為,根據二維模擬的結果,在1.5nm氧化鉿(HfO2)閘極氧化層元件上看到一條獨特的兩個步階(two-step)電容曲線,我們歸因於垂直及邊緣電通密度效應所造成的。第三章考慮電流分佈效應,推導超薄閘極氧化層(1nm)n型金氧半元件閘極穿遂電流模型,此模型把電流分佈分成三個區間探討,經由實驗數據驗證後,對於長通道或短通道元件的閘極電流皆能做出準確的預測。對長通道元件而言,閘極穿遂電流主要由前飽和區域(pre-saturation region)主導。對短通道元件,操作在飽和區時,閘極電流有可能變為負值,這是因為靠近汲極處通道表面垂直電場反向的緣故。第四章為總結。 The thesis analyzes the capacitance behavior and gate tunneling current model of MOS devices. Chapter 1 introduces the importance of high-k materials applied to gate dielectrics. Chapter 2 discusses the gate capacitances behavior of nanometer FD SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effects using 2D simulation. Based on the 2D simulation results, a unique two-step CS(D)G/CGS versus VG curve could be identified for the device with the 1.5nm HfO2 gate dielectric due to the vertical and fringing displacement effects. Chapter 3 derives the partitoned gate tunneling current model for NMOS devices with an ultra-thin(1nm) gate oxide considering the distributed effects. As verified by the experimentally measured data, this partitioned gate tunneling current model based on the three segment approach provides an accurate prediction of the gate current for the device with a long or short channel. Chapter 4 is the conclusion of this research. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/33949 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-95-1.pdf 目前未授權公開取用 | 1.65 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。