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請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/33516
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor郭斯彥(Sy-Yen Kuo)
dc.contributor.authorHung-Yau Linen
dc.contributor.author林宏遙zh_TW
dc.date.accessioned2021-06-13T04:44:52Z-
dc.date.available2007-07-19
dc.date.copyright2006-07-19
dc.date.issued2006
dc.date.submitted2006-07-17
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/33516-
dc.description.abstract在大量製造的半導體產業中,欲生產無瑕疵記憶體單元(memory cell)的記憶體晶片的渴望從未消失。然而,當記憶體晶片的密度隨著VLSI科技的快速進展而逐漸增加之際,要生產無瑕疵的記憶體晶片變得越來越困難。對於一個有著一致結構的裝置而言,例如動態隨機儲存記憶體,使用備用行以及備用列是彌補記憶體晶片中出現瑕疵記憶體單元的一種有效方法。有這種備份配置的裝置叫做可重設的記憶體陣列(reconfigurable memory array)。搜尋一個用備份原件取代瑕疵記憶體單元的解的過程叫做記憶體修復問題或者備份配置問題。備份配置問題已經被證明是一個NP-complete問題。本論文第一部分描述一個把記憶體修復問題轉換成一系列布林(Boolean)函式運算的布林轉換技巧。一個重設解可以從這一系列函式中的其中一個函式得到。本文提到的布林轉換技巧並不侷限使用在備份配置問題中,該技巧也可以應用到其它領域的問題。
在過去,很多的演算法被提出來解決連接點為完全可靠的網路的可靠度計算問題。這類問題已被證明是NP-complete問題。然而,在真實世界中連線與連接點都可能損壞。在計算網路可靠度的時候,把不完全可靠的連接點也考慮在內會讓演算法的效率變的更差。本論文第二部分提出一個額外運算量很低的演算法來把不可靠的連接點的效果也考慮在網路可靠度的計算之中。在設計一個網路拓撲的時候,了解哪個元件的失效對網路可靠度最大是非常重要的事,因為可以使用更好的元件在最重要元件的位置或者重新設計網路拓撲。本論文也提出一個非常有效率的演算法來找出最重要的網路元件。
有效的布林函式工具對於本論文所提出的方法是非常必要的,而有序二元決策圖以及布林滿足工具(Boolean satisfiability solver)是兩個非常有效率的工具。在記憶體修復問題中的布林運算可用任何求布林解的工具進行運算,例如上述的二元決策圖以及布林滿足工具。然而,在網路可靠度運算中的可靠度函式或者系統失效(unavailability)函式則必須儲存在可以遊走(traversable)的資料結構內。此外,這些結構也必須自動可以把獨立事件乘積和編碼在結構內。這些要求使得布林滿足工具無法被使用在網路可靠度運算中。因此,有序二元決策圖是本論文中用來解布林運算的主要工具,也是探討的焦點。
zh_TW
dc.description.abstractIn volume semiconductor industries, the desire to produce as many defect-free memory chips as possible never ceases. However, as the density of memory chips grows constantly along with the rapid advancement of VLSI technology, it becomes harder and harder to fabricate memory chips containing no defect. For devices having a uniform structure such as dynamic random access memories, introducing spare rows as well as spare columns is one of the effective solutions to compensate for the occurrence of faulty cells. Devices with such redundancy are known as reconfigurable memory arrays. Searching for a solution which replaces with spares all faulty cells of a reconfigurable memory array is called the memory reconfiguration problem or the spare allocation problem. The spare allocation problem has been shown to be NP-complete. The first part of this thesis describes an efficient Boolean transformation technique which transforms a memory reconfiguration problem into a set of Boolean function operations. A repair solution can then be derived from one of the Boolean functions. The idea of the Boolean transformation technique is not limited to spare allocation problems. It can also be applied to problems in other fields.
In the past, many algorithms have been presented to solve network reliability evaluation problems in which vertices are considered perfectly reliable. Such problems have been shown to be a NP-hard problem. However, the vertices as well as the links of a network can fail in the real world. Taking the effect of imperfect vertices into account makes the performance of these algorithms worse. The second part of this thesis presents two low overhead strategies for taking into account the imperfect vertices in a network. In the design of a network topology, it is important to identify the most crucial component, i.e. a vertex or a link, of a network so that efforts can be made to keep it functional. A highly efficient algorithm is also presented in this part to identify the most crucial component of a network. The algorithms presented in the second part require a tool capable of encoding SDP (sum of disjoint products) forms of a Boolean expression.
Efficient tools for Boolean function manipulations are essential for the Boolean encoding/transformation techniques presented in this thesis. The reduced ordered binary decision diagram and the Boolean satisfiability (SAT) are two of the efficient tools. The Boolean operations in the memory reconfiguration problem can be performed with any Boolean solvers, such as the SAT solver or the reduced ordered binary decision diagram. However, a reliability or unavailability expression in the network reliability evaluation problem needs to be stored in a traversable data structure which implicitly encodes the SDP forms of the expression. These requirements exclude the SAT solver from being used in the network reliability evaluation problem. The reduced ordered binary decision diagram is therefore the primary tool used in this thesis.
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dc.description.tableofcontents1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Memory Reconfiguration . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.1 The Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1.2 Importance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1.3 Previous Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2 Network Reliability Evaluation . . . . . . . . . . . . . . . . . . . . . 12
1.2.1 The Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.2.2 Importance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.2.3 Previous Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2 Reduced Ordered Binary Decision Diagrams . . . . . . . . . . . 21
2.1 The Basics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.1.1 Binary Decision Diagrams . . . . . . . . . . . . . . . . . . . . . . 22
2.1.2 Ordered Binary Decision Diagrams . . . . . . . . . . . . . . . 23
2.1.3 Reduced Ordered Binary Decision Diagrams . . . . . . . . 24
2.2 Variable Orderings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.3 Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.3.1 The Apply Operation . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.3.2 The Restriction Operation . . . . . . . . . . . . . . . . . . . . . . 34
2.3.3 The Composition Operation . . . . . . . . . . . . . . . . . . . . 34
2.4 Time Complexity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.5 Inverted Edges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3 Memory Reconfiguration . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.1 The First Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1.1 The must-repair Algorithm . . . . . . . . . . . . . . . . . . . . . 41
3.1.2 The early-abort Algorithm . . . . . . . . . . . . . . . . . . . . . 41
3.1.3 The single-faulty-cell Filter . . . . . . . . . . . . . . . . . . . . 42
3.1.4 The Gallai-Edmonds Structure Theorem . . . . . . . . . . 42
3.2 C&K03 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.3 The Second Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.3.1 B&B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.3.2 Boolean Transformation . . . . . . . . . . . . . . . . . . . . . . 54
3.4 Mathematical Proof . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.4.1 The Constraint Function . . . . . . . . . . . . . . . . . . . . . . 65
3.4.2 The Solution Function . . . . . . . . . . . . . . . . . . . . . . . 68
3.5 Variable Orderings . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.6 Equivalent Problems . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.7 Extensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.8 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 89
3.8.1 Non-overlapped d3 Blocks . . . . . . . . . . . . . . . . . . . . 90
3.8.2 Fault Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4 Network Reliability Evaluation . . . . . . . . . . . . . . . . . . . 107
4.1 Edge Expansion Diagrams . . . . . . . . . . . . . . . . . . . . . 109
4.1.1 The Path Function . . . . . . . . . . . . . . . . . . . . . . . . . . 110
4.1.2 The Cut Function . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
4.1.3 Imperfect Vertices . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.1.4 k-terminal Networks . . . . . . . . . . . . . . . . . . . . . . . . 127
4.2 Minimal Cuts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
4.2.1 Imperfect Vertices . . . . . . . . . . . . . . . . . . . . . . . . . . 136
4.3 Essential Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
4.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 138
5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
5.1 Spare Allocation Problems . . . . . . . . . . . . . . . . . . . . . 145
5.2 Network Reliability Evaluation . . . . . . . . . . . . . . . . . 147
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
dc.language.isoen
dc.subject記憶體修復zh_TW
dc.subject布林運算zh_TW
dc.subject布林轉換zh_TW
dc.subject有序二元決策圖zh_TW
dc.subject網路可靠度zh_TW
dc.subjectnetwork reliability problemen
dc.subjectordered binary decision diagramen
dc.subjectROBDDen
dc.subjectBoolean transformationen
dc.subjectBoolean operationen
dc.subjectmemory reconfiguration problemen
dc.title以有序二元決策圖為基礎的布林轉換解決記憶體修復及網路可靠度問題zh_TW
dc.titleSolving Memory Reconfiguration and Network Reliability Problems with BDD-based Boolean Transformationsen
dc.typeThesis
dc.date.schoolyear94-2
dc.description.degree博士
dc.contributor.oralexamcommittee雷欽隆,顏嗣鈞,王勝德,趙涵捷,王國禎,陳英一,蘇銓清
dc.subject.keyword記憶體修復,網路可靠度,有序二元決策圖,布林轉換,布林運算,zh_TW
dc.subject.keywordmemory reconfiguration problem,network reliability problem,ordered binary decision diagram,ROBDD,Boolean transformation,Boolean operation,en
dc.relation.page163
dc.rights.note有償授權
dc.date.accepted2006-07-18
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電機工程學研究所zh_TW
顯示於系所單位:電機工程學系

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