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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 蔡豐羽(Feng-Yu Tsai) | |
| dc.contributor.author | I-Tseng Chen | en |
| dc.contributor.author | 陳奕錚 | zh_TW |
| dc.date.accessioned | 2021-06-13T00:22:49Z | - |
| dc.date.available | 2007-07-31 | |
| dc.date.copyright | 2007-07-31 | |
| dc.date.issued | 2007 | |
| dc.date.submitted | 2007-07-26 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/28789 | - |
| dc.description.abstract | 本研究的主題是利用原子層沉積技術(Atomic layer deposition, ALD)來沉積高介電常數的介電層和封裝層在五環素(Pentacene)薄膜電晶體上的研究。其目標是利用高介電常數的介電層來降低元件的threshold voltage (Vth)以及利用封裝層使元件的壽命延長並減少在封裝過程中對元件造成的傷害。
在介電層的研究方面,70 nm厚度介電層ALD Al2O3的元件其Vth為-6.6 V, 與一般傳統利用熱氧化矽當作介電層的元件相比(-30~-50V),有顯著的下降。 在封裝層的研究方面,封裝的過程中,在最佳的封裝溫度90℃之下,由於annealing的影響,讓Pentacene的分子排列更好,使得元件的mobility由0.34 cm2/Vs提升到0.52 cm2/Vs。而沉積30 nm ALD Al2O3當作封裝層的元件,在一般大氣的環境之下,其壽命由原本的60個小時延長到291個小時。 雖然本篇研究成功的降低薄膜電晶體的Vth以及達到延長元件壽命的目標,但是元件的漏電流與一般傳統利用熱氧化矽當作介電層的元件相比大了100倍,而且壽命仍遠低於現有封裝文獻所報導的值。 以原子層沉積技術可以沉積無缺陷膜的特性來說,在未來的研究當中,我們可以最佳化原子層沉積技術的成膜條件,利用在介電層與封裝層上;同時利用多層材料的封裝方法,來延長元件壽命。 | zh_TW |
| dc.description.abstract | This study uses atomic layer deposition (ALD) to develop high-dielectric-constant thin films and encapsulation thin films for pentacene thin-film transistors (TFT), with the goals of lowering the threshold voltage (Vth) and improving the lifetime of the OTFTs while minimizing the encapsulation-induced deterioration. A 70 nm-thick ALD Al2O3 dielectric yielded a Vth of -6.6 V, which was lower than the typical reported value of -50V with SiO2. The ALD encapsulation process caused no detectable deterioration to the pentacene TFTs, and with the ALD temperature set an optimized value of 90℃, the hole mobility of the TFTs increased from 0.34 to 0.52 cm2/Vs upon encapsulation as a result of annealing-enhanced molecular alignment. Encapsulating with a 30 nm-thick ALD Al2O3 film improved the lifetime of the TFTs in ambient air from ~60 hours to 291 hours. Although the ALD films yielded improvements in both Vth and the lifetime, the improvements fell far short of what may be achieved with ALD films’ defect-free characteristic in that the leakage current through the ALD dielectric was ~100-fold that of a typical SiO2 dielectric and that the life time was significantly shorter than reported values with organic encapsulants. The ALD dielectrics and encapsulation will be optimized in the following work through (1) pretreating the surface to ensure thorough and rapid nucleation of the ALD films, (2) fine-tuning the ALD process conditions, and (3) stacking the ALD films with organic films into a multilayer encapsulation film. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-13T00:22:49Z (GMT). No. of bitstreams: 1 ntu-96-R94527049-1.pdf: 1881573 bytes, checksum: 2414302aa88371c1aa5c99f53790d572 (MD5) Previous issue date: 2007 | en |
| dc.description.tableofcontents | Acknowledgement...i
Abstract (Chinese)...ii Abstract (English) ...iii Contents...iv List of figures and table...vi Chapter 1 Introduction...1 1.1 History of Organic thin film transistor and Pentacene OTFT...1 1.2 Basic properties of pentacene...4 1.3 Brief working principle of OTFT...6 1.4 Passivation of OTFT...10 1.4.1 Importance of passivation of OTFT...10 1.4.2 Mechanisms of OTFTs degradation: H2O, O2, and continuous operation...10 1.4.2.1 Degradation of pentacene OTFTs by H2O...10 1.4.2.2 Degradation of pentacene OTFTs by O2 and UV-light...13 1.4.2.3 Degradation of pentacene OTFTs by continuous operation ...13 1.4.4 Techniques of encapsulation for OTFTs...17 1.4.4.1 Encapsulation using inorganic layer(s)...17 1.4.4.2 Organic layer...20 1.4.4.3 Mixed organic and inorganic layer...22 1.5 High-dielectric-constant insulator layer for OTFTs...23 1.6 Mechanism of Atomic layer deposition (ALD)...24 1.7 Objective statement...26 Chapter 2 Experiment...27 2.1 Fabrication of Metal-Insulator-Metal (MIM) Capacitor...27 2.2 Device Fabrication of OTFT...28 2.3 Device encapsulation of OTFT...30 2.4 Measurement of devices...30 Chapter 3 Results and discussions...36 3.1 Evaluation of ALD dielectric layer...36 3.1.1 Leakage current test...36 3.1.2 Effects of the thickness of the ALD Al2O3 dielectric layer...40 3.2 Encapsulation process...43 3.2.1 Encapsulation-induced deterioration of pentacene TFTs...43 3.2.2 Effects of the post-annealing temperature...46 3.2.3 Origin of the temperature dependence of the effects of post annealing...53 3.3 Evaluation of ALD encapsulation...56 Chapter 4 Conclusion and future works...64 4.1 Conclusion...64 4.2 Future works...65 4.2.1 Improving performance of devices...65 4.2.2 Improving lifetime of devices...66 References...67 | |
| dc.language.iso | en | |
| dc.subject | 封裝 | zh_TW |
| dc.subject | 有機薄膜晶體 | zh_TW |
| dc.subject | 原子層沉積 | zh_TW |
| dc.subject | organic thin film transistor | en |
| dc.subject | encapsulation | en |
| dc.subject | Atomic Layer Deposition | en |
| dc.title | 原子層沉積技術於有機薄膜電晶體上應用之研究 | zh_TW |
| dc.title | A Study on the Applications of Atomic Layer Deposition on Organic Thin Film Transistors | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 95-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 陳文章,吳忠幟,劉國辰 | |
| dc.subject.keyword | 原子層沉積,有機薄膜晶體,封裝, | zh_TW |
| dc.subject.keyword | Atomic Layer Deposition,organic thin film transistor,encapsulation, | en |
| dc.relation.page | 69 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2007-07-27 | |
| dc.contributor.author-college | 工學院 | zh_TW |
| dc.contributor.author-dept | 材料科學與工程學研究所 | zh_TW |
| 顯示於系所單位: | 材料科學與工程學系 | |
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