使用GEZEL及OMAP平台之軟硬體協同設計效能預估與驗證

Abstract

在本論文中，我們提出一套適用於軟硬體協同設計之效能預估方法，並且實作於硬體平台上驗證模擬結果之效能預估準確度。我們採用GEZEL作為軟硬體協同模擬環境，透過GNU gprof進行軟體程式分析，將最耗系統資源及運算複雜度高的區塊，以SystemC或GEZEL設計成硬體模組，利用GEZEL模擬環境所提供的介面將軟體及硬體模組連接起來，進行軟硬體協同模擬。藉由軟硬體協同模擬的結果，我們成功地將FIR (Finite Impulse Response) Filter實作於同時具有ARM和DSP雙處理器之OMAP5912平台，驗證模擬結果之效能預估準確度，在該平台上我們採用DSP Gateway做為軟硬體模組之間連接溝通的橋樑，由於此種軟硬體溝通方式是基於作業系統的架構下，上層的軟體模組必須透過系統呼叫、驅動程式來和底層的硬體模組溝通，必須考慮到溝通及資料交換時所付出的成本，因此，我們實際量測出DSP Gateway所需的最低溝通成本，欲將特定功能或運算移至DSP端實現時，須大於最低溝通成本，否則以硬體實現後之軟硬體協同設計效能將不增反減，藉由我們所提出的方法進行模擬及驗證將可得到準確度高的效能預估結果。

In this paper, we propose an approach of performance estimation for HW/SW co-design using the GEZEL co-simulation environment. We also implement the design with the OMAP platform and verify the result of co-simulation for accuracy of performance estimation. We use the GNU gprof utility to analyze the source code and take advantage of SystemC or GEZEL to design hardware modules for the most time-consuming block. The hardware and software co-simulation is achieved by using the interface provided by GEZEL to link hardware and software modules. Also we have compared the co-simulation result with the actual execution of the hardware/software implementation in the OMAP platform. We are successful in implementing the FIR (Finite Impulse Response) Filter on OMAP5912 which contains ARM and DSP dual-processor. The result is coincided with the co-simulation done by the GEZEL envrionment. On the OMAP platform, we use the DSP Gateway to bridge hardware and software modules. Communication overheads are raised by the architecture of the operating system, where the upper layer software modules need to communicate with lower layer hardware modules via system calls and drivers. Thus, we have to consider the overheads of communications and context switches. We measure the communication overhead of the DSP Gateway for read and write operations. Through this proposed methods, we are able to acquire high accuracy of performance estimation for HW/SW co-design.