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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 江簡富(Jean-Fu Kiang) | |
dc.contributor.author | Ping-Yuan Deng | en |
dc.contributor.author | 鄧平援 | zh_TW |
dc.date.accessioned | 2021-06-12T18:19:43Z | - |
dc.date.available | 2008-08-28 | |
dc.date.copyright | 2007-08-28 | |
dc.date.issued | 2007 | |
dc.date.submitted | 2007-08-27 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/27771 | - |
dc.description.abstract | 在本篇論文中,我們利用標準TSMC 0.18 μm CMOS製程設計24 GHz的低雜訊放大器(LNA)、壓控振盪器(VCO)以及單刀單擲(SPST)切換開關。
在LNA的設計方法中,我們透過使用較小的電晶體尺寸與偏壓電流來得到最佳雜訊的輸入電阻(Ropt)及Zin* = Zopt ,並使其接近50歐姆。當操作頻率為24 GHz時,這個LNA晶片可以達到峰值增益13.5 dB與雜訊指數4.7dB,供應電源及偏壓電流分別是1 V與8.3 mA,輸入及輸出的返回損失均可達10 dB以上,輸入功率1 dB壓縮點 為-7 dBm,晶片面積為0.64 mm × 0.48 mm。 在VCO的設計中,我們透過變壓器回授來增強振盪振幅並降低相位雜訊;透過變壓器可不需要額外的跨壓,因此可降低消耗功率。這個VCO晶片的相位雜訊在頻率偏移1 MHz時,可達到-104.38 dBc/Hz,並透過NMOS變容器調整輸出振盪頻率達400 MHz。在供應電源為1 V下所消耗的功率為6 mW,晶片面積為0.52 mm × 0.34 mm。 在SPST切換開關的設計中,我們透過LC共振器電路來降低開關打開時的介入損失以及提高開關關閉時的隔離度。在操作頻率為24 GHz時,這個開關的介入損失與隔離度分別為0.7 dB與25 dB,輸入功率1 dB壓縮點為16 dBm,有效使用的晶片面積僅0.17 mm × 0.23 mm。 | zh_TW |
dc.description.abstract | In this thesis, a 24 GHz LNA, VCO, and SPST switch have been designed and fabricated in a standard TSMC 0.18 μm 1P6M CMOS technology.
A design method of CMOS LNA is used to render the optimum source resistance (Ropt) close to 50 Ohm and Zin* = Zopt by using small devices and small bias currents. This LNA chip achieves a peak gain of 13.5 dB and a noise figure of 4.7 dB at 24 GHz. The supply voltage and supply current are 1 V and 8.3 mA, respectively. The input and output return loss are lower than −10 dB. The input referred 1-dB compression (P1dB) is −7 dBm. The chip size is 0.64 mm × 0.48 mm. The oscillation amplitude is enhanced by transformer-feedback to lower the phase noise. The supply voltage can be reduced since no extra voltage headroom is required by the transformer, thus the power consumption can be reduced. The VCO chip exhibits phase noise of −104.38 dBc/Hz at 1 MHz offset and an output tuning range of 400 MHz using NMOS varactor. The VCO consumes a dc power of 6 mW with a supply voltage of 1 V. The chip area is 0.52 mm × 0.34 mm. The on-resistance can be decreased by increasing the width of transistor, but capacitive coupling to the substrate will become significant. An LC resonant technique is proposed to decrease the insertion loss in the on-state and increase the isolation in the off-state. The switch achieves insertion loss and isolation of 0.7 dB and 25 dB, respectively. The input P1dB of the switch is 16 dBm. The effective chip size is only 0.17 mm × 0.23 mm. | en |
dc.description.provenance | Made available in DSpace on 2021-06-12T18:19:43Z (GMT). No. of bitstreams: 1 ntu-96-R94942061-1.pdf: 2952999 bytes, checksum: be7ac6a5bb69138026b194e2da396de3 (MD5) Previous issue date: 2007 | en |
dc.description.tableofcontents | Abstract ii
Table of Contents v List of Figures ix List of Tables x Acknowledgment xii 1 Introduction 1 2 A K-Band CMOS Low-Noise Amplifier with Low DC Power Consumption 3 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 Circuit Design and Implementation . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.1 General Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.2 Noise Matching with Power Matching . . . . . . . . . . . . . . . . . . 5 2.2.3 Input Matching Network . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2.4 Design of 24 GHz LNA . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.5 Stability Concern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.6 Layout Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.3 Results and Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3 A K-Band CMOS High-Performance Voltage-Controlled Oscillator 21 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.2 Circuit Design and Implementation . . . . . . . . . . . . . . . . . . . . . . . 21 3.2.1 VCOs with Conventional LC Tank . . . . . . . . . . . . . . . . . . . 21 3.2.2 VCO with Transformer Feedback . . . . . . . . . . . . . . . . . . . . 24 3.2.3 Planar Transformer Design . . . . . . . . . . . . . . . . . . . . . . . . 26 3.2.4 Design of 24 GHz VCO . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.3 Results and Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4 A K-Band CMOS Low Insertion Loss SPST Switch Using LC Resonator 37 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4.2 Circuit Design and Implementation . . . . . . . . . . . . . . . . . . . . . . . 38 4.2.1 Conventional Series-Shunt Switch . . . . . . . . . . . . . . . . . . . . 38 4.2.2 LC Resonator Technique of Switch . . . . . . . . . . . . . . . . . . . 39 4.2.3 Design of 24 GHz SPST Switch . . . . . . . . . . . . . . . . . . . . . 45 4.3 Simulated Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 4.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 5 Conclusion 53 | |
dc.language.iso | en | |
dc.title | 24 秭赫互補式金氧半低雜訊放大器、壓控振盪器及開關之研製 | zh_TW |
dc.title | Design of CMOS Low-Noise Amplifier, Voltage-Controlled
Oscillator, and Switch at 24 GHz | en |
dc.type | Thesis | |
dc.date.schoolyear | 95-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 劉深淵(Shen-Iuan Liu),黃天偉(Tian-Wei Huang),呂良鴻(Liang-Hung Lu) | |
dc.subject.keyword | 低雜訊放大器,壓控振盪器,開關, | zh_TW |
dc.subject.keyword | Low-Noise Amplifier,Voltage-Controlled Oscillator,Switch, | en |
dc.relation.page | 58 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2007-08-27 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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