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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 盧信嘉 | |
| dc.contributor.author | Kun-Chih Lin | en |
| dc.contributor.author | 林坤志 | zh_TW |
| dc.date.accessioned | 2021-06-08T06:26:39Z | - |
| dc.date.copyright | 2006-07-31 | |
| dc.date.issued | 2006 | |
| dc.date.submitted | 2006-07-27 | |
| dc.identifier.citation | [1] Ron Ho, Kenneth W. Mai and Mark A. Horowitz, “The Future of Wires,” Proc. IEEE, pp. 490-504, Apr., 2001.
[2] E. Kyriaskis-Bitzaros and N. Haralabidis, “Realistic End-to-End Simulation of the Optoelectronic Links and Comparison With the Electrical Interconnections for System-On-Chip Applications,” Journal of Lightwave Technology, vol. 19, no. 10, pp. 1532-1541, Oct. 2001. [3] Ron Ho, Kenneth W. Mai and Mark A. Horowitz, “Efficient On-Chip Global Interconnects,” Symp. VLSI Circuits, pp. 271-274, June, 2003. [4] Richard T. Chang, Niranjan Talwalkar, Patric Yue and S. Simon, “Near Speed-of-Light Signaling Over On-Chip Electrical Interconnects,” IEEE J. Solid-State Circuits, vol. 38, pp. 834-838, May, 2003. [5] Jeffrey A. Davis, Raguraman Venkatesan, Alain Kaloyeros, Michael Beylansky, Shukri J.Souri, Kaustab Naberjee, Krishna C. Saraswat, Arifur Rahman, Rafael Reif and James D. Meindl, “Interconnect limits on gigascale integration (GSI) in the 21st century,” Proceedings of the IEEE, vol.89, no.3, pp. 305-324, March 2001. [6] Rao R. Tummala, “Fundamentals of Microsystems Packaging,” McGraw-Hill 2001. [7] Tsung-Shan Chen, “Determination of the Capacitance, Inductance, and Characteristic Impedance of Rectangular Lines,” IRE Transaction on Microwave Theory and Techniques, vol. 8, pp. 510-519, Sep. 1960. [8] W. R. Eisenstadt and Y. Eo, “S-parameter-based IC interconnect transmission line characterization,” IEEE Trans. on Comp., Hybrids, Manufact. Technol., vol. 15, pp. 483-490, Aug. 1992. [9] D. Deslandes and K. Wu, ‘‘Single-substrate integration technique of planar circuits and waveguide filters,’’ IEEE Trans. on Microwave Theory Tech., vol. 51, pp.593-596, Feb. 2003. [10] David M. Pozar, “Microwave Engineering”, New York, Wiley, 2005 [11] Robert A. Sainati and Thomas J. Moravec, “Estimating high speed circuit interconnect performance,” IEEE Trans. on Circuits and Systems, vol. 36, no. 4, April 1989. [12] Stephen H. Hall, Garret W. Hall and James A. McCall, “High speed digital system design,” John Wiley & Sons 2000. [13] S. Kuhn, M. Kleiner, R. Thewes and W. Weber, “Vertical signal transmission in three-dimensional integrated circuits by capacitive coupling,” ISCAS 1995, vol. 1, 1995, pp 37-40. [14] Hiroyuki Ito, Hideyuki Sugita, Kenichi Okada and Kazuya Masu, “4 Gbps on-chip interconnection using differential transmission line,” IEEE Asian Solid State Circuits Conference., pp. 417-420, April 2005. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/25722 | - |
| dc.description.abstract | 本論文以系統晶片封裝的觀點做出發，並且應用低溫共燒陶瓷的製程解決晶片中廣域連結的傳輸問題，利用低溫共燒陶瓷的多層結構，使得晶片設計者可以設計符合自己所需特性阻抗的傳輸線，並且透過封裝中較低的衰減係數與低頻時相較於晶片中窄導體有較高相速度的特性得到較佳的傳輸效能與較低的功率消耗。 | zh_TW |
| dc.description.abstract | This thesis is based on the concept of the System in Package to solve the problem of transmission of intra-chip or inter-chip global interconnect by using the LTCC (low temperature co-fired ceramic) process. By using the multilayer structure of LTCC, the chip designer can easily design the transmission line with characteristic impedance he needs. He can also get a better transmission efficiency and low power consumption because of lower attenuation constant and higher phase velocity compared with the narrow metal on chip in low frequency of the on package transmission line. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T06:26:39Z (GMT). No. of bitstreams: 1 ntu-95-R93943072-1.pdf: 905929 bytes, checksum: 51c49a179f80c6b56d792bd5ff22e1a0 (MD5) Previous issue date: 2006 | en |
| dc.description.tableofcontents | Chapter 1 Introduction………………………………………………………… 1
1.1 Motivation……………………………………………………………… 1 1.2 SiP concept……………………………………………………………... 1 1.3 Low temperature co-fired ceramics (LTCC)………………………… 2 1.3.1 Introduction……………………………………………………… 2 1.3.2 LTCC manufacturing process………………………………….. 2 1.3.3 LTCC applications………………………………………………. 4 1.4 Previous art in global interconnect........................................................ 5 1.5 Overview……………………………………………………………….. 7 Chapter 2 Signal distribution in package……………………………………… 8 2.1 Introduction……………………………………………………………. 8 2.1.1 Why package important………………………………………… 8 2.2 Signal distribution……………………………………………………... 9 2.2.1 Devices and interconnections…………………………………… 9 2.2.2 Transmission line behavior of interconnections……………….. 12 2.2.3 Typical transmission line structure used as interconnections… 16 2.2.4 Transmission line reflections and matching mechanism……… 17 2.2.5 When are transmission lines effects important?......................... 20 Chapter 3 Rectangular coaxial line……………………………………………. 22 3.1 Characteristic impedance of rectangular coaxial line with perfect conductor wall…………………………………………………………. 22 3.1.1 Implementation of rectangular coaxial line with via fence…… 26 3.2 Attenuation constant and phase velocity-perfect metal wall case...... 27 3.2.1 Simulated results of attenuation constant……………………… 27 3.2.2 Simulated results of phase velocity……………………………... 29 3.2.3 Measurement of the attenuation constant and phase velocity... 31 3.2.4 Equivalent circuit of the signal via……………………………... 34 3.3 Eye-diagram and delay time-perfect metal wall case……………….. 36 3.3.1 Simulation of eye diagram and delay time…………………….. 36 3.3.2 Measurement of eye diagram and delay time…………………. 38 3.4 Crosstalk……………………………………………………………….. 43 3.4.1 Simulation and measurement results…………………………... 43 3.5 Comparison between perfect metal wall and via wall………………. 45 Chapter 4 Transmitter and receiver circuit design……………………………. 49 4.1 Introduction…………………………………………………………… 49 4.2 Circuit schematic……………………………………………………… 50 4.3 Simulation result………………………………………………………. 53 4.4 Performance comparison……………………………………………... 60 Chapter 5 Conclusion………………………………………………………….. 61 Reference……………………………………………………………………….. 62 | |
| dc.language.iso | en | |
| dc.title | 應用低溫共燒陶瓷製程之適用晶片中廣域連結的分析與量測 | zh_TW |
| dc.title | Analysis and measurement of an intra-chip or inter-chip global interconnect by using LTCC manufacturing process | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 94-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 瞿大雄,陳怡然 | |
| dc.subject.keyword | 低溫共燒陶瓷,廣域連結, | zh_TW |
| dc.subject.keyword | LTCC,global interconnect, | en |
| dc.relation.page | 63 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2006-07-28 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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