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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電信工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/23675
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor黃天偉(Tian-Wei Huang)
dc.contributor.authorHao-Wei Huangen
dc.contributor.author黃皓瑋zh_TW
dc.date.accessioned2021-06-08T05:07:04Z-
dc.date.copyright2011-08-23
dc.date.issued2011
dc.date.submitted2011-08-18
dc.identifier.citation[1] http://www.ntia.doc.gov/osmhome/allochrt.PDF.
[2] Yang, T. Y. and H. K. Chiou, “A 16-46 GHz mixer using broadband multilayer balun in 0.18-um CMOS technology,” IEEE Microw. Wireless Compon. Lett., Vol. 7, No. 7, 534-536, Jul. 2007.
[3] Chi-Cheng Hung, “Research of Microwave and Millimeter-wave Power Amplifiers and Frequency Multipliers,” Master Thesis, National Taiwan University, June 2010.
[4] IEEE P802.15-05-0596-01-003c.pdf.
[5] Guan-Jie Huang, “Design of K-Band CMOS Gain Boosting Low Noise Amplifier and V-Band GaAs pHEMT Cascode Balance Power Amplifier,” Master Thesis, National Taiwan University, February 2011.
[6] Michael Ellis, Introduction to Mixers, 1999.
[7] B. Razavi, RF Microelectronics, Prentice Hall, 1998.
[8] PL15-10 0.15um pHEMT LN Document.
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[10] A. Madjar, “A novel general approach for the optimum design of microwave and millimeter wave subharmonic mixers”, IEEE Transactions on Microwave Theory and Techniques,vol. 44, pp.1997-1999, Nov. 1996.
[11] M.Cohn, James E. Degenford, Burton A. Newman, “Harmonic mixing with an antiparallel diode pair”, IEEE Transactions on Microwave Theory and Techniques, vol. 2, pp.71-76, May 1978.
[12] K. Itoh, A. Iida, Y. Sasaki, and S. Urasaki, “A 40 GHz band monolithic even harmonic mixer with an antiparallel diode pair,’’ in IEEE MTT-S Int. Dig., vol. 2, pp. 879-882, 1991.
[13] H. Okazaki, and Y. Yamaguchi, ”Wide-Band SSB Subharmonically Pumped Mixer MMIC,” IEEE Transactions on Microwave Theory and Techniques, vol. 45, no. 12, pp. 2375-2379, December 1997.
[14] Chun-Lin Kuo, Bo-Jr Huang, Che-Chung Kuo, Kun-You Lin, Huei Wang. “A 10-35 GHz Low Power Bulk-Driven Mixer Using 0.13umCMOS Process” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 455-457, 2008.
[15] C. Kienmayer, M. Tiebout, W. Simburger, and A. L. Scholtz. “A Low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90nm CMOS,” in Proc. IEEE Int. Symp. Circuits Syst., May 2004, vol. 4,pp. 385–388.
[16] Che-Yu Wang, Jeng-Han Tsai. ”A 51 to 65 GHz Low Power Bulk-Driven Mixer Using 0.13 um CMOS Technology” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 8, pp. 521-523, 2009.
[17] F.-C. Chang, P.-C. Huang, S.-F. Chao, and H. Wang, “A low power folded mixer for UWB system applications in 0.18-um CMOS technology,” IEEE Microw. Wireless compon. Lett., vol. 17, no. 5, pp. 367–369, May 2007.
[18] C.-C. Tang, W.-S. Lu, L.-D. Van, and W.-S. Feng, “A 2.4 GHz CMOS down-conversion doubly balanced mixer with low supply voltage,” inProc. IEEE Int. Symp. Circuits Syst. (ISCAS), May 2001, vol. 4, pp.794–797.
[19] C. Hermann, M. Tiebout, and H. Klar, “A 0.6-V 1.6-mW Transformer-based 2.5GHz downconversion mixer with +5.4dB gain and -2.8dBm IIP3 in 0.13um CMOS” IEEE Trans. Microw. Theory Tech., vol. 53, no. 2, pp. 488–495, Feb. 2005.
[20] “TSMC 0.18-μm CMOS logic/MS/RF and 0.16-μm CMOS Logic/MS design rule, and document” Taiwan Semiconductor Manufacturing Co, Ltd, 2008.
[21] Chao-Chieh Li, To-Po Wang, Student Member, IEEE, Che-Chung Kuo, Mei-Chen Chuang, and Huei Wang, Fellow. IEEE” A 21 GHz Complementary Transformer Coupled CMOS VCO” IEEE Microw. Wireless Compon. Lett., VOL. 18, NO. 4, April 2008.
[22] Yen-Hung Kuo, Jeng-Han Tsai, Tian-Wei Huang. ” A 1.7-mW, 16.8% Frequency Tuning, 24 GHz Transformer-Based LC-VCO using 0.18-μm CMOS Technology” IEEE Radio Frequency Integrated Circuits Symposium 2009.
[23] Sheng-Lyang Jang, Chien-Feng Lee, Chia-Wei Chang. “A K-band differential Colpitts cross-coupled VCO in 0.13 lm CMOS” Solid-State Electronics 53 (2009) 931–934.
[24] Chieh-An Lin, Jing-Lin Kuo, Kun-You Lin, and Huei Wang. “A 24 GHz Low Power VCO With Transformer Feedback” IEEE Radio Frequency Integrated Circuits Symposium 2009.
[25] K. Kawakami, M. Shimozawa, H. Ikematsu, K. Itoh, Y. Isota, and O. Ishida, “A millimeter-wave broadband monolithic even harmonic image rejection mixer,” IEEE MTT-S Int. Microwave Sym., pp. 1443-1446, June 1998.
[26] Hittite mixer HMC339 datasheet.
[27] H. Morkner, S. Kumar, and M. Vice, “A 18-45 GHz Double-Balanced Mixer with Integrated LO Amplifier and Unique Suspended Broadside-Coupled Balun,” Gallium Arsenide Integrated Circuit Symposium, pp. 267- 270, November 2003.
[28] W. C. Chen, S. Y. Chen, J. H. Tsai, T. W. Huang, and H. Wang, “A 38–48 GHz miniature MMIC subharmonic mixer,” in Proc. Gallium Arsenide Other Semicond. Appl. Symp., 2005, pp. 437–440.
[29] S. E. Gunnarsson, D. Kuylenstierna, and H. Zirath, “A 60 GHz MMIC pHEMT image reject mixer with integrated ultra wideband IF hybrid and 30 dB of image rejection ratio,” in Proc. Asia-Pacific Microw. Conf., Suzhou, China, 2005, pp. 1–4.
[30] M. Varonen, M. Karkkainen, J. Riska, P. Kangaslahti, and K. A. I. Halonen, “Resistive HEMT mixers for 60 GHz broad-band telecommunication,” IEEE Trans. Microw. Theory Tech, vol. 53, no. 4, pt. 1, pp. 1322–1330, Apr. 2005.
[31] C.-S. Lin, P.-S.Wu, H.-Y. Chang, and H.Wang, “A 9-50 GHz Gilbertcell down-conversion mixer in 0.13-umCMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 5, pp. 293–295, May 2006.
[32] J.-H. Tsai, P.-S. Wu, C.-S. Lin, T.-W. Huang, J. G. J. Chern, W.-C. Huang, and H. Wang, “A 25–75 GHz broadband Gilbert-cell mixer using 90-nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 17, no. 4, pp. 247–249, Apr. 2007.
[33] M.-D. Tsai and H. Wang, “A 0.3–25 GHz ultra-wideband mixer using commercial 0.18-um CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 14, no. 11, pp. 522–524, Nov. 2004.
[34] Jeng-Han Tsai, “Design of 1.2-V Broadband High Data-Rate MMW CMOS I/Q Modulator and Demodulator Using Modified Gilbert-Cell Mixer,” IEEE Transactions on Microwave Theory and Techniques, vol. 59, pp. 1350 - 1360, May 2011.
[35] Daryl Van Vorst, and Shahriar Mirabbasi, “Low-power 1V 5.8 GHz bulk-driven mixer with on-chip balun in 0.18μm CMOS,” in Proc. IEEE RFIC Symp., 2008, pp. 197-200. 2008.
[36] E. Frlan, S. Meszaros, M. Cuhaci, and J. Wight, “Computer aided design of square spiral transformers and inductors,” Proc. IEEE MTT-S, vol. 2, pp. 661–664, June 1989.
[37] K. H. Liang, et al., “A 0.5-to-7.5GHz Ultra-Low-Voltage Low-Power Mixer Using Bulk-Injection Method in 0.18μm CMOS Technology,” IEEE Microwave and Wireless Component Letters, vol. 17, no. 7, pp. 531-533, July 2007.
[38] A. Verma, L. Gao, and J. Lin, “A K-band down-conversion mixer with 1.4 GHz bandwidth in 0.13-um CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol. 15, no. 8, pp. 493–495, Aug. 2005.
[39] Verma,A., O, K.K., Lin, J. “A Low Power Up-Conversion CMOS Mixer for 22-29 GHz ultra wideband application” IEEE Trans. Microw. Theory Tech., vol. 54, no 8, pp. 3295 - 3300, 2006.
[40] Dukju Ahn, Dong-Wook Kim, Songcheol Hong. “A K-Band High-Gain Down-Conversion Mixer in 0.18um CMOS Technology” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 4, pp. 227 - 229, 2009.
[41] Che-Yu Wang, Jeng-Han Tsai. ”A 51 to 65 GHz Low Power Bulk-Driven Mixer Using 0.13 um CMOS Technology” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 8, pp. 521-523, 2009.
[42] Chun-Lin Kuo, Bo-Jr Huang, Che-Chung Kuo, Kun-You Lin, Huei Wang. “A 10-35 GHz Low Power Bulk-Driven Mixer Using 0.13um CMOS Process” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 7, pp. 455-457, 2008.
[43] C. Kienmayer, M. Tiebout, W. Simburger, and A. L. Scholtz. “A Low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90nm CMOS,” in Proc. IEEE Int. Symp. Circuits Syst., vol. 4,pp. 385–388, May 2004.
[44] G. Gonzalez, Microwave Transistor Amplifiers Analysis and Design. Upper Saddle River, NJ: Prentice-Hall, 1997.
[45] “TSMC 90-nm CMOS logic/MS/RF design rule, and document”Taiwan Semiconductor Manufacturing Co, Ltd., 2009.
[46] Lin Chin-Shen, “Research on Millimeter-Wave Frequency Conversion Circuits,” Ph.D. Thesis, National Taiwan University, July 2007.
[47] Hong-Yeh Chang, “Research on Millimeter-wave Reflection-type Modulators and Their Applications,” Ph.D Thesis, National Taiwan University, June 2004.
[48] B. Razavi, “A mm-wave CMOS heterodyne receiver with on-chip LO, divider,” in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2007, pp. 188–189.
[49] Jeong-Geun Kim, “A CMOS K-Band Quadrature Generator”, IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, pp. 130-132,2008.
[50] SangWoo Kim, JoonSung Park, YoungGun Pu, Kang-Yoon Lee,” A Low Power, Wide Range VCO with AutomaticAmplitude Calibration Loop” IEEE ASICON, 2009, pp. 455 – 457.
[51] T-N. Luo, S-Y. Bai, and Y-J. Emery. Chen, “A 60 GHz 0.13 mm CMOS Divided-By-Three Frequency Divider,” IEEE Transaction on Microwave Theory and Techniques, Vol. 56, No. 11, Nov 2008.
[52] A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and design of injection locked LC dividers for quadrature generation,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1425–1433, Sep. 2004.
[53] Agilent Technologies, Harmonic Balance simulation help handbook.
[54] T. Yu, et al., “A 4-Channel 24-27 GHz CMOS Differential Phased-Array Receiver,” RFIC Symp., pp. 455-458, Jun. 2009.
[55] G. J. Carchon, D. M. M.-P. Schreurs, W. D. Raedt, P. V. Loock, and B. K. J. C. Nauwelaers, “A direct Ku-band linear subharmonically pumped BPSK and I/Q vector modulator in multilayer thin-filmMCM-D,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 8, pp.1374–1382, Aug. 2001.
[56] G. K. W. Hamed, A. P. Freundorfer, Y. M. M. Antar, P. Frank, and D. Sawatzky, “A high-bit rate ka-band direct conversion QPSK demodulator,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 5, pp.365–367, May 2008.
[57] J.-H. Tsai and T.-W. Huang, “35–65 GHz CMOS broadband modulator and demodulator with sub-harmonic pumping for MMW wirelessgigabit applications,” IEEE Trans. Microw. Theory Tech., vol. 55, no.10, pp. 2075–2085, Oct. 2007.
[58] A. Mazzanti, M. Sosio, M. Repossi, F. Svelto, “A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS,” ISSCC Dig. Tech. Papers, pp. 216-217, Feb. 2008.
[59] S. Sarkar, P. Sen, S. Pinel, C. H. Lee, and J. Laskar, “Si-based 60GHz 2X subharmonic mixer for multi-Gigabit wireless personal area network application,” in Proceedings of IEEE MTTS International Microwave Symposium, San Francisco, Calif, USA, June 2006.
[60] M. W. Chapman and S. Raman, 'A 60GHz uniplanar MMIC 4X subharmonic mixer,' IEEE Trans. Microwave Theory & Tech., vol. 50, no.11, pp. 2580-2588, Nov 2002.
[61] H. Dogan, R. G. Meyer, and A. M. Niknejad, “Analysis and design of RF CMOS attenuators,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2269–2283, Oct. 2008.
[62] Y. S. Dai, D. G. Fang, and Y.-X Guo, “A novel UWB (0.045–50 GHz) digital/analog compatible MMIC variable attenuator with low insertion phase shift and large dynamic range,” IEEE Microw.Wireless Compon. Lett., vol. 17, no. 1, pp. 61–63, Jan. 2007.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/23675-
dc.description.abstract本篇論文,首先介紹混波器在毫米波無線收發機的功用,同時探討混波器幾個重要的參數,由於混波器在毫米波系統上,是個不可或缺的子電路,因此,在系統的考量上,混波器的特性必須加重被考慮,從基本的混波器開始,並且介紹各種混波器的架構與其優缺點,進而延伸至由混波器組成的正交解調器,在非理想效應下對系統的干擾做探討與補償方案。
因應大紘股份有限公司所示出的專題,簡要介紹60GHz收發機系統之規畫,各參數之說明,架構的選取,並且以穩懋提供之0.15um low noise pHEMT研製60GHz 次諧波雙向混波器,詳細的設計流程,電晶體選取,微小化之等效濾波器之設計,阻抗之匹配。A V-band anti-parallel pair diode sub-harmonic mixer in 0.15um pHEMT,60GHz 之轉換損耗為10dB,IF頻寬為4GHz,2LO-到-RF隔離度為45dB以上,線性度之輸出1dB壓縮點為-8dBm。
從台積電提供的CMOS製程設計混波器,針對混波器的本地振盪功率參數著墨,在毫米波的積體電路實現上,欲獲取較大輸出功率時會直接反應在較大的直流功耗,操作頻率越高時,製程的限制使輸出功率彌足珍貴,為了保持在驅動電路低功率輸出下混波器還能有良好之特性,做了不同架構的晶片實現。A Ka-band之differentially bulk-source driven mixer in 0.18um CMOS,在本地振盪功率-11dBm之下,其24 GHz之轉換增益為2dB,LO-到-RF隔離度大於50dB,直流功耗為1.5毫瓦。基於此bulk-source混頻器IF頻寬只有200MHz與基頻緩衝器不穩定,A redesign Ka-band bulk-source driven with pseudo PMOS IF buffer,使IF頻寬提升至600MHz,且混頻器中心操作頻率更接近目標頻率。
第三部分,介紹由混波器組成的正交解調器。正交解調器是微波系統的重要架構,也是現行無線通訊積體電路中之核心元件之一,在追求高速率傳輸的無線前端電路設計上, 往往採用正交形式的解調器來增加位元傳輸速率,具有極高的附加價值。然而正交解調器存在非理想效應,振幅相位不匹配效應,此不匹配會造成信號在基頻的錯誤, 因此往往EVM and constellation的好壞與正交平衡的程度有很大的關係。為了解決不匹配問題,諸多文獻已發表提供各種校正方法,以簡化複雜度為前提,本次實驗設計出具有較低複雜度可調整振幅相位的解調器。A 24 GHz down-converter with Tunable Amplitude and Phase Compensated in 0.18um CMOS Process,24 GHz之轉換增益為5dB,振幅相位補償前的sideband suppression為24dBc,補償後為45dBc,增進了20dBc以上,補償機制直流功耗不超過15毫瓦。
最後為附錄部分,因應於802.11.ad之規劃,每個頻道頻寬為2.16GHz,應用在低IF的無線通訊前端電路上,設計出具有低相位的衰減器,0.05~4GHz low-phase error attenuator in 90nm CMOS,最大衰減量為37dB其相位錯誤在3以下,在通道頻寬2.16GHz之下, 輸入輸出返回損失皆大於10dB。
zh_TW
dc.description.abstractIn this thesis, the first is introduction to millimeter-wave mixers in the wireless transceiver application and discussed several important parameters that observed in mixers. The mixers are essential component in the millimeter wave systems, therefore, considerations on the system, the mixer performance must be considered carefully. The basic mixer, and introduce a variety of mixers and their advantages or disadvantages of the structure, and then extended to the quadrature demodulator that composed of the mixers. Furthermore, focus on non-ideal effects of the demodulator and implemented the compensation work.
For Airwave Corporation released a 60GHz transceiver project. A brief described system plan, the selection of architecture, and each important parameter. The process provided by WIN Development of 0.15um low noise pHEMT. A sub-harmonic mixer has been designed. The detail of the selection of the transistor size, the equivalent miniaturized filter, and impedance matching are investigated interestingly. A V-band anti-parallel pair diode sub-harmonic mixer in 0.15um pHEMT was designed and measured, which appears 10-dB of the conversion loss and owns 4 GHz intermediate frequency (IF) bandwidth at 60 GHz radio frequency(RF). The 2LO-to-RF isolation is more than 45-dB, and the linearity of the output power 1-dB compression point is -8dBm, as well no DC power required.
As complementally metal-oxide semiconductor (CMOS) process provided from TSMC was designed in monolithic microwave integrated circuits (MMIC). The mixer required a local oscillator signal to converse up or down the carrier frequency. Among the mixer several specifications, the local oscillator power is valuable in the millimeter-wave integrated circuit. The desire for greater output power will be directly related in the larger DC power consumption. As operating to higher frequency, the process limited the output power is too precious to difficulty drive the mixers while still maintains the performance such as conversion gain properties. To overcome the limit, implemented the low-LO power mixers. A Ka-band of the differentially bulk-source driven mixer in 0.18um CMOS was implemented. The measurement of the mixer required only -11-dBm of the local oscillator power while achieved 2-dB of the conversion gain at the 24 GHz frequency as well as 1.5mW of the DC power consumption. Furthermore, due to the narrow IF frequency bandwidth, operation frequency shifted, and unstable IF buffer in above work. A redesign Ka-band bulk-source driven mixer in 0.18-um CMOS was designed, which improves the IF bandwidth to 600MHz, center operation frequency to 22 GHz and IF buffer stabilized.
The third part describes the quadrature demodulator which composed of two the unit down-conversion mixers. The quadrature demodulators play an important role in microwave systems. It is also one of the core components in the pursuit of high-speed wireless transmission system on recently wireless communication development. It often in the form of the orthogonal demodulator to increase the data bit transfer rate, which has a high added worth in transceiver architecture. However, there are non-ideal effects in the quadrature demodulators, which are the amplitude and the phase mismatch. The mismatch occurs from I/Q amplitude and phase balance can directly cause the error signal at baseband. In reality, observes the error vector magnitude (EVM) or constellation has been regarded as demodulation good or bad. In order to solve the mismatch problem, many papers has been published to provide several calibration methods. To simplify the complexity of the premise, this experiment has a lower complexity to accomplish amplitude and phase controlled technique so that adjust the mismatch effects. A 24 GHz down-converter with Tunable Amplitude and Phase Compensated in 0.18 um CMOS Process was designed. The down-converter achieves 5-dB of the conversion at 24 GHz frequency. Before amplitude and phase compensated the sideband-suppression is 24-dBc. After compensation, the sideband-suppression is improved to more than 45dBc, enhanced above 20dBc. The DC power of the compensation technique consumes 15mW at most.
The last part is attenuator in appendix, for the 802.11.ad planning, each channel bandwidth is 2.16GHz. To use in low-IF front-end circuits for wireless communications, design a low phase error of the attenuator. A 0.05 ~ 4GHz low-phase error attenuator in 90nm CMOS was designed. The measurement of the maximum attenuation is 37-dB all under the 3o of the phase error, and the bandwidth is from 50-MHz to 4 GHz. The good input and output return loss are more than 10-dB under the channel bandwidth 2.16 GHz.
en
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en
dc.description.tableofcontents口試委員會審定書 i
誌謝 ii
中文摘要 iii
ABSTRACT v
CONTENTS viii
LIST OF FIGURES xi
LIST OF TABLES xviii
Chapter 1 Introduction 1
Chapter 2 Design of Mixers for mm-Wave Applications 2
2.1 Introduction 3
2.1.1 Overview of Mixer [6],[7] 4
2.2 Design of 60 GHz Sub-harmonic Passive Mixer in 0.15mm GaAs pHENT Process 8
2.2.1 Introduction to Airwave Project 9
2.2.2 Process Overview 11
2.2.3 Diode Mixer 11
2.2.4 A V-band Sub-harmonic Passive Mixer 17
2.2.5 Experiment Measured Results 22
2.2.6 Summary 27
2.3 Low-DC power and Low-LO power for MMIC 30
2.3.1 Overview of Low-power CMOS Mixers 31
2.4 Design of Ka-Band Source and Bulk Simultaneously Driven Doubly Balanced Mixer in 0.18um CMOS Process 33
2.4.1 CMOS 0.18um Process Overview 34
2.4.2 Concept of Modified Bulk-Driven Mixer 34
2.4.3 A K-Band Source and Bulk Simultaneously Driven Mixer 38
2.4.4 Performance Measurement Results 44
2.5 A Redesign of Ka-Band Bulk-Source-Driven Doubly Balanced Mixer in Stability and bandwidth Issue 50
2.5.1 Resistive feedback buffer 51
2.5.2 Redesign Measurement Results 53
2.5.3 Analysis and Discussion 58
Chapter 3 IQ Demodulator Mismatch Correction with Tunable Phase and Amplitude Control 61
3.1 Introduction MMW receiver 61
3.1.1 Overview of Receiver architecture [7][46] 61
3.2 Design of 24 GHz Down-Converter with Tunable Amplitude and Phase Compensated in 0.18um CMOS Process 66
3.2.1 Concept of Precedence 67
3.2.2 Component of Down-Conversion Mixer 68
3.2.3 Component of Quadrature Generator 71
3.2.4 Demodulator sideband-suppression tunable control 77
3.3 Summary & Future Work 81
Chapter 4 Conclusion 83
Appendix: Low-Phase Error Attenuator in CMOS 90nm process 2
1.1 Introduction to Project 2
1.2 Low-phase error 0.05~6 GHz Attenuator in 90nm CMOS Process 3
1.2.1 Overview 3
1.2.2 CMOS 90nm Process Overview 6
1.2.3 Circuit Design 7
1.2.4 Experiment Results 11
1.3 Discussion 13
1.4 Summary 15
REFERENCE 17
dc.language.isoen
dc.title低功率最佳化降頻轉換器與正交不匹配消除之研究zh_TW
dc.titleResearch of Down-Converter on Low-Power Optimization and IQ Mismatch-Eliminated Techniqueen
dc.typeThesis
dc.date.schoolyear99-2
dc.description.degree碩士
dc.contributor.oralexamcommittee蔡政翰(Jeng-Han Tsai),張鴻埜(Hong-Yeh Chang)
dc.subject.keyword混頻器,低功率,降頻轉換器,不匹配,衰減器,zh_TW
dc.subject.keywordmixer,low-power,down-converter,mismatch,attenuator,en
dc.relation.page106
dc.rights.note未授權
dc.date.accepted2011-08-20
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電信工程學研究所zh_TW
顯示於系所單位:電信工程學研究所

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