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標題: | 應用於低壓降穩壓器與液晶顯示器行驅動電路之運算放大器的設計與分析 Design and Analysis of Operational Amplifiers for Low Dropout Regulators and LCD Column Drivers |
作者: | Wei-Jen Huang 黃威仁 |
指導教授: | 劉深淵(Shen-Iuan Liu) |
關鍵字: | 運算放大器,緩衝放大器,非反相放大器,低壓降穩壓器,液晶顯示器行驅動電路, Operational Amplifier,Buffer Amplifier,Noninverting Amplifier,Low Dropout Regulator,LCD Column Driver, |
出版年 : | 2011 |
學位: | 博士 |
摘要: | 在所有的類比積體電路中,運算放大器大概是最具功能而且可以有效利用的積體電路。運算放大器的許多應用包括進行在電壓信號的各種各樣的數學運算,例如反相、加法、減法、積分、微分、乘法和除法,而這些運算放大器已經被廣泛的使用在信號處理電路、控制電路與儀表電路,其中一種運算放大器的重要應用是設計非反相放大器、緩衝放大器與反相放大器。隨著高品質與低功率電子產品的快速發展,設計一個高效能的運算放大器來滿足特定的需求成為一個相當重要的課題。
本論文主要分為兩個部份,首先介紹緩衝放大器應用於液晶顯示器行驅動電路。其次介紹非反相放大器應用於低壓降穩壓器。在第二章中,提出一個可適用於大範圍輸出電容與電阻負載變化的軌對軌緩衝放大器,並且提出使用直流位準偏移式電流鏡與分裂式米勒補償技術來達成,使得這個緩衝放大器可以適用於各種尺寸的高品質液晶顯示面板。在第三章中,提出一個可適用於大範圍輸出電容與電阻負載變化的低壓降穩壓器,並且提出使用主動式電阻巢式米勒補償與一位元可程式電容陣列技術來達成,使得這個低壓降穩壓器可以適用於系統單晶片的應用中。在第四章中,提出一個供應電源排斥比促進能力的低壓降穩壓器,使得這個低壓降穩壓器可以適用於低干擾的電路應用中。在第五章中,提出可以操作在低於一伏特的低壓降穩壓器與參考電壓產生器,使得低壓降穩壓器可以適用於低電壓的電路應用中。 Of all analog integrated circuits, the operational amplifier (op amp) is probably the most versatile integrated circuit available. Many applications of op amp include performing various mathematical operations on voltage signals such as inversion, addition, subtraction, integration, differentiation, multiplication by a constant and division. These op amps are widely used in signal processing circuits, control circuits, and instrumentation. One of the important applications of op amp is to design noninverting, buffer, and inverting amplifiers. With the larger demand for high-quality low-power electronic devices, there is a really important topic to design a high-performance op amp to satisfy certain requirements. This dissertation is mainly divided into two parts. A buffer amplifier for liquid crystal display (LCD) column driver applications is introduced first, followed by a noninverting amplifier for low dropout regulator (LDR) applications. In chapter 2, a rail-to-rail class-B buffer with a dc level-shifting current mirror and the proposed distributed Miller compensation is presented. This proposed class-B buffer is suitable for small-, medium-, and large-size high-quality display panel applications. In chapter 3, a capacitor-free CMOS LDR using the nested Miller compensation with an active resistor (NMCAR) is presented. This proposed LDR is suitable for system-on-chip (SoC) applications. In chapter 4, a power supply rejection ratio (PSRR) enhancement technique for the LDR is presented. This proposed LDR is suitable for low-noise circuit applications. In chapter 5, the sub-1V LDRs and an on-chip voltage reference are presented. These proposed LDRs are suitable for low-voltage circuit applications. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/23606 |
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顯示於系所單位: | 電子工程學研究所 |
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