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標題: | 以高頻電容及溫度電壓施壓法檢測超薄氧化層特性 Characterization of Ultrathin Oxides by High-Frequency C-V Analysis and Temperature-Voltage Stress Method |
作者: | Hao-Peng Lin 林豪鵬 |
指導教授: | 胡振國(Jenn-Gwo Hwu) |
關鍵字: | 薄膜氧化層,金氧半電容,應力,電荷分布,Terman 公式, thin film MOS capacitor,FN stress,thermal stress,stress,thermal stress,lateral nonuniformity,Terman,charge distribution, |
出版年 : | 2010 |
學位: | 博士 |
摘要: | 在本篇論文中,我們深入探討氧化層的細微電特性,針對電荷在矽氧化層中的空間分佈情況,當氧化層中的電荷分佈不均勻,會造成高頻電容曲線有局部形變(Distortion),我們將此種電荷不均勻現象,利用許多分析方法去推測出其相關的電荷種類,並試以外部應力的方式,改善內部電荷的不均勻分佈情況。
首先,在第一部份,我們把Terman介面分析方法,加上量子效應(Quantum Mechanism)的考量,用來分析電荷在氧化層不均勻分布的現象。Terman 介面分析方法,已被長期使用成一種分析介面缺陷密度的方法,但隨著元件的氧化層厚度越來越薄,量子效應會使得計算出來的結果有誤差,本篇論文將Terman 方法加上量子效應修正(QM-based Terman),經過模擬和實驗驗証其可行性後,將高頻電容經過QM-based Terman計算後,可能出現”負”的介面缺陷值,作為一個電荷不均勻分布的指標,研究在金氧半電容元件的電荷不均勻分布現象。在由實驗上觀察到外加電場及去離子水浸泡皆會改善電荷分布的均勻度,推測應是外加電場造成氧化層內部電荷重新分布,而去離子水中的氫離子移動到Si-SiO2介面,甚至侵入到氧化層中可以修補部份不完美的鍵結,如懸垂鍵(Dangling bond),或提供本身的正電性以重建較均勻的電場。 接著本篇論文第二個重點,除了電荷在氧化層的不均勻分佈外,氧化層在同時受到外加高電場及溫度加熱的效應,會使得部份元件在受此應力之後,在積聚區(Accumulation)之電流會出現異常增高,而在飽和區(Saturation)電流微許下降,而元件在經過浸泡去離子水後,可以修補這些缺陷。在經過量測變溫電流的分析後,我們計算出其產生的缺陷能階為低於導電帶0.168 eV處的”淺缺陷”,此種淺缺陷經過簡易的電路模擬,推測也可能是形成電荷分佈不均勻的原因之一。 論文的最後,為本研究作一個結論,也提出一些延續的研究方向供大家參考。 In this dissertation, ultrathin oxides of MOS capacitor were characterized through high-frequency C-V analysis and external temperature-voltage stress. The nonuniform distribution of oxide charges results in the distortion of high-frequency C-V curve. The lateral nonuniformity (LNU) effect was analyzed and modeled in this work. Firstly, the Terman method, which has been used as a tool for calculating the interface traps density Dit, was modified with the consideration of quantum mechanical effect. When the dielectric layers become thin to the scale around 2 ~ 3 nm, quantum effects should be taken into consideration. The Terman method was modified with quantum mechanism concern and both of theoretical simulation and experimental data were examined to check its feasibility. The QM-based Terman method might also obtain negative Dit if the high-frequency C-V curves are distorted by LNU charge distribution in the dielectric layer of MOS capacitors. To take a deeper look into the constitutions of LNU effects, external constant voltage stress (CVS) and water immersion were applied to clarify the roles of injected carriers in the LNU effects. Besides, the amount of effective oxide charge (Qeff) is also found to be responsible to the LNU effects. Then, the effects of high electric field stress and thermal stress on MOS capacitor were analyzed. After the applying of Fowler-Nordheim stress (FNS) and thermal stress (TS), an abrupt increase of gate injection current can be measured, especially when both FNS and TS (FNTS) were applied together. Some percolation paths might be formed among the oxide defects and cause the abrupt current rise. Interestingly, it is found that the soft breakdown (SBD) time of FNTS devices is prolonged after being treated with subsequent deionized water immersion. Furthermore, the gate current density is recovered due to deionized water immersion treatment. According to Poole-Frenkel conduction model analysis, a shallow trap level of 0.168 eV under the conduction band was extracted. By modeling such shallow trap as ROX (oxide resistance) in parallel with COX, it is supposed to be one factor of the LNU effect as well. Finally, the conclusion of this work and the suggestion for future work were given. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/23365 |
全文授權: | 未授權 |
顯示於系所單位: | 電子工程學研究所 |
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