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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 曹恆偉(Hen-Wai Tsao) | |
| dc.contributor.author | Yi Cheng | en |
| dc.contributor.author | 程奕 | zh_TW |
| dc.date.accessioned | 2021-06-08T03:52:39Z | - |
| dc.date.copyright | 2018-08-21 | |
| dc.date.issued | 2018 | |
| dc.date.submitted | 2018-08-17 | |
| dc.identifier.citation | [1] Circuit and Signal Processing Techniques of Tx/Rx for Low-Power AP in Smart Badge Systems, MOST Research Project Grant Proposal, 2014.
[2] Medical Device Radio Communications Service, 47 Code of Federal Regulations §95 Subpart I, 2017. [3] G. Hueber and R. B. Staszewski, Multi-Mode/Multi-Band RF Transceivers for Wireless Communications, Wiley-IEEE Press, 2011. [4] M. S. Alavi et al., Radio-Frequency Digital-to-Analog Converters, Academic Press, 2016. [5] D. Schreurs et al., RF Power Amplifier Behavioral Modeling, Cambridge University Press, 2008. [6] J. Zhuang et al., 'A Technique to Reduce Phase/Frequency Modulation Bandwidth in a Polar RF Transmitter,' in IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 57, no. 8, pp. 2196-2207, Aug. 2010. [7] J. E. Volder, 'The CORDIC Trigonometric Computing Technique,' in IRE Trans. Electron. Comput., vol. EC-8, no. 3, pp. 330-334, Sept. 1959. [8] A. Ba et al., 'A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications,' in IEEE J. Solid-State Circuits, vol. 51, no. 12, pp. 3103-3113, Dec. 2016. [9] P. A. J. Nuyts et al., Continuous-Time Digital Front-Ends for Multistandard Wireless Transmission, Springer International Publishing, 2014. [10] M. Bellanger et al., 'Digital filtering by polyphase network: Application to sample-rate alteration and filter banks,' in IEEE Trans. Acoust., Speech, Signal Process., vol. 24, no. 2, pp. 109-114, Apr. 1976. [11] Z. Song et al., 'A Low-Power NB-IoT Transceiver with Digital-Polar Transmitter in 180-nm CMOS,' in IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 64, no. 9, pp. 2569-2581, Sept. 2017. [12] C. D. Presti et al., 'Closed-Loop Digital Predistortion System with Fast Real-Time Adaptation Applied to a Handset WCDMA PA Module,' in IEEE Trans. Microw. Theory Tech., vol. 60, no. 3, pp. 604-618, Mar. 2012. [13] J. Chen et al., 'The Design of All-Digital Polar Transmitter Based on ADPLL and Phase Synchronized ΔΣ Modulator,' in IEEE J. Solid-State Circuits, vol. 47, no. 5, pp. 1154-1164, May 2012. [14] S. Zheng and H. C. Luong, 'A CMOS WCDMA/WLAN Digital Polar Transmitter with AM Replica Feedback Linearization,' in IEEE J. Solid-State Circuits, vol. 48, no. 7, pp. 1701-1709, July 2013. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/21910 | - |
| dc.description.abstract | The Smart Badge System is composed of a base station transmitter and receiver along with a set of Smart Badges. It is an Internet of Things (IoT) system designed to monitor the physiological signals of the human body.
This thesis is focused on the digital signal processing (DSP) architecture design for a base station transmitter of the Smart Badge System. The transmitter is realized using an all-digital polar architecture that incorporates a digital pre-power amplifier (DPA) for generating the radio frequency (RF) signal. In order to compensate for the AM-AM and AM-PM distortions caused by the DPA, a digital predistortion (DPD) module is utilized to maintain the spectral performance of the transmitter. Under the assumption that the DPA was operating in its maximum output range, the error vector magnitude (EVM) of the RF signal was simulated to be about 1.30 %. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T03:52:39Z (GMT). No. of bitstreams: 1 ntu-107-R03943016-1.pdf: 1062190 bytes, checksum: c2062c0978330faba89422d6f597b4d8 (MD5) Previous issue date: 2018 | en |
| dc.description.tableofcontents | 摘要 i
Abstract ii List of Figures v List of Tables vi Acknowledgement vii Chapter 1 Introduction 1 1.1. Motivation 1 1.2. Smart Badge System 1 1.3. Thesis Outline 2 Chapter 2 Base Station Transmitter for the Smart Badge System 3 2.1. Introduction 3 2.1.1. Specifications 3 2.1.2. MedRadio 4 2.2. Architecture 5 2.2.1. Overview 5 2.2.2. All-Digital Phase-Locked Loop 6 2.2.3. Digital Pre-Power Amplifier 6 2.3. Design Considerations 7 2.3.1. Nonlinearities of the Digital Pre-Power Amplifier 7 2.3.2. Delay Mismatch Between the Amplitude and Phase Paths 8 Chapter 3 Digital Baseband of the Transmitter 9 3.1. Overview 9 3.2. Symbol Mapper 10 3.3. Pulse-Shaping Filter 11 3.4. CORDIC 12 3.5. Power Control 14 3.6. Digital Predistortion Module 15 3.6.1. Overview 15 3.6.2. Architecture 15 3.7. Interpolation Filter 16 Chapter 4 RF Front-End of the Transmitter 18 4.1. Overview 18 4.2. Delay Alignment Module 19 4.3. Feedback Path 20 Chapter 5 Simulation Results of the Transmitter 21 5.1. Overview 21 5.2. Simulation Results 21 Chapter 6 Conclusion 23 6.1. Thesis Summary 23 6.2. Future Works 24 Bibliography 25 | |
| dc.language.iso | en | |
| dc.title | 應用於智慧型標籤系統基站發射機之數位訊號處理架構設計 | zh_TW |
| dc.title | Digital Signal Processing Architecture Design for a Base Station Transmitter of the Smart Badge System | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 106-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 李揚漢(Yang-Han Lee),陳家偉(Chia-Wei Chen) | |
| dc.subject.keyword | 數位訊號處理架構,全數位極座標發射機,相位調變頻寬縮減,數位預失真,延遲校準, | zh_TW |
| dc.subject.keyword | Digital signal processing architecture,All-digital polar transmitter,Phase modulation bandwidth reduction,Digital predistortion,Delay alignment, | en |
| dc.relation.page | 26 | |
| dc.identifier.doi | 10.6342/NTU201800135 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2018-08-17 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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