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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/19805完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳中平(Charlie Chung-Ping Chen) | |
| dc.contributor.author | Hao-Huei Chang | en |
| dc.contributor.author | 張灝暉 | zh_TW |
| dc.date.accessioned | 2021-06-08T02:20:14Z | - |
| dc.date.copyright | 2015-08-21 | |
| dc.date.issued | 2015 | |
| dc.date.submitted | 2015-08-20 | |
| dc.identifier.citation | [1] Jeng-Han Tsai, et al., “A miniature Q-band low noise amplifier using 0.13-μm CMOS technology,” IEEE Microwave Theory and Techniques Society, vol. 16, no. 6, pp. 327-329, June 2006.
[2] M.A. Masud, et al., “90 nm CMOS MMIC amplifier,” in IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Dig., June 2004, pp. 201-204. [3] Shih-Chieh Shin, et al., “A 3.9-dB NF low-noise amplifier using 0.18-μm CMOS technology,” IEEE Microwave Theory and Techniques Society, vol. 15, no. 7, pp. 448-450, July 2005. [4] Chieh-Min Lo, Chin-Shen Lin, and Huei Wang, “A miniature V-band 3-stage cascode LNA in 0.13μm CMOS,” International Solid-State Circuits Conference Dig. Tech. papers, pp. 402-403, Feb. 2006. [5] F. Ellinger, “26-42 GHz SOI CMOS low noise amplifier,” IEEE Journal of Solid-State Circuits, vol. 39, no. 3, pp. 522-528, Mar. 2004. [6] Kuo-Jung Sun, et al., “A noise optimization formulation for CMOS low-noise amplifiers with on-chip low-Q inductors,” IEEE Microwave Theory and Techniques Society, vol. 54, no. 4, pp. 1554-1560, Apr. 2006. [7] Sherif Galal, and Behzad Razavi, “Broadband ESD protection circuits in CMOS technology,” IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2334-2340, Dec. 2003. [8] Ming-Dou Ker, and Bing-Jye Kuo, “Decreasing-size distributed ESD protection scheme for broad-band RF circuits,” IEEE Trans. Microwave Theory and Tech., vol. 53, no. 2, Feb. 2006, pp. 582-589. [9] Ming-Dou Ker, Chien-I Chou, and Chien-Ming Lee, “A novel LC-tank ESD protection design for giga-Hz RF circuits,” Radio Frequency Integrated Circuits (RFIC) Symposium, 2003. Digest of Papers, June. 2003, pp. 115–118. [10] Vadim Issakov, and Maciej Wojnowsli, ”Low-noise ESD-protected 24 GHz receiver for radarapplications in SiGe:C technology” European Solid-State Circuits Conference, 2009.. [11] S.-C. Shin, M.-D. Tsai, R.-C. Liu, K.-Y. Lin, and H. Wang, “A 3.9-dB NF low-noise amplifier using 0.18-μm CMOS technology,” IEEE Microwave and Wireless Component Letters, vol. 15, no. 7, pp. 448-450, July 2005. [12] J. Xu, N. Yan, Q. Chen, J. Gao, X. Zeng, “A 3.4 dBNF k-band LNA in 65nm CMOS technology” 2013 IEEE International Symposium on Circuits and Systems (ISCAS), pp.1123-1126, May 2013. [13] T. Ming-Hsien, S. S. H. Hsu, H. Fu-Lung, J. Chewn-Pu, Y. Tzu-Jin and S. Ming-Hsiang, et al., 'An ultra-low power K-band low-noise amplifier co-designed with ESD protection in 40-nm CMOS,' in Proc. 2011 IC Design & Technology (ICICDT), 2011 IEEE International Conference on, pp. 1-4. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/19805 | - |
| dc.description.abstract | 隨著科技的進步，無線通訊在我們生活中扮演著不可或缺的角色，而可攜式裝置的普及也讓晶片的尺寸越來越重要，因此本論文針對現今人們經常使用的K-band無線接收機前端之低雜訊放大器，進行電路設計，以降低面積消耗為目標，利用Quasi-Transformer的架構特性，降低面積消耗，以達到一個應用於K-band無線接收機之低雜訊放大器。
本次設計使用台積電0.18微米製程，利用串聯兩級疊接放大器作為架構，在24 GHz可達到14dB增益以及3.9dB之雜訊指數，功率消耗15.66mW，電路面積為0.506mm2。 | zh_TW |
| dc.description.abstract | By the evolution of technology, digital data communication systems have become essential to our daily life. Wireless communication and portable devices become handy and brings the human being with more conveniences. People rely on the usage of portable devices and wireless communication more and more every day. Therefore, this thesis is going to design a low noise amplifier applied on K-band wireless communication. The goal for this design is to achieve small area to meet the demand of portable devices and wireless communication. Quasi-Transformer is utilized in this design to achieve the goal for small area. In the end, we accomplished a design of a low noise amplifier with Quasi-Transformer applied for K-band.
This design is tape-out through 0.18μm technology by the Taiwan Semiconductor Manufacturing Company (TSMC). The two stage cascode topology is adopted for the amplifier design to achieve 14dB gain, noise figure of 3.9dB, 15.66mW of power, and occupies 0.506mm2 of area. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-08T02:20:14Z (GMT). No. of bitstreams: 1 ntu-104-R98943127-1.pdf: 1333433 bytes, checksum: 829e1dee431d823b771906497e295dac (MD5) Previous issue date: 2015 | en |
| dc.description.tableofcontents | 誌謝 iii
中文摘要 iv ABSTRACT v CONTENTS vi LIST OF FIGURES ix LIST OF TABLES xi Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 2 Chapter 2 Basic Concepts 3 2.1 Scattering Parameters 3 2.2 Conversion Gain 6 2.3 Harmonics 6 2.4 Gain Compression 8 2.5 Intermodulaion 9 Chapter 3 Proposed LNA for K Band Applications 15 3.1 Desigb Consideration and Basic Theory of LNA 15 3.1.1 Fundamentals of the LNA 16 3.2 Proposed LNA Architecture 19 3.2.1 Transistor and Configuration Select 19 3.2.2 Operating voltage consideration 20 3.2.3 Configuration Selection 20 3.3 Low noise amplifier design 21 3.3.1 Transistor Size and Bias Design 21 3.3.2 Design of Impedance Matching Inductors 24 3.4 Matching Network Design 27 3.4.1 Circuit matching 27 3.4.2 Bypass circuits design 29 3.5 Design flow 30 3.6 Simulation Results 31 3.6.1 LNA Small Signal Simulation 31 3.7 Input Output Power and Linearity Simulation 33 3.8 Stability Simulation 35 3.8.1 Circuit Stability 35 3.8.2 Inter-stage Stability 35 3.9 Process Variation Simulation 36 3.9.1 Transistor Corner Effect 36 3.9.2 Temperature Effect 37 3.10 Measurement Considerations 39 Chapter 4 Conclusion and Future Work 40 4.1 Conclusion 40 4.2 Future Work 40 LIST OF FIGURES Figure 2 1 Transmission line with the source end at d=l, and load end at d=0 3 Figure 2 2 The incident and reflected waves in a two-port network 5 Figure 2 3 Definition of 1-dB gain compression point 8 Figure 2 4 Output spectrum of the two-tone intermodulation products 10 Figure 2 5 Two tone test of a nonlinear system 10 Figure 2 6 The fundamental and the third-order intermodulation products 11 Figure 2 7 Third-order intercept diagram 12 Figure 2 8 Geometric interpretation for the calculation of IIP3 13 Figure 2 9 Two stages nonlinear system 13 Figure 3 1 The typical circuit diagram of an LNA 16 Figure 3 2 Schematics of the multiple cascaded amplified stages 17 Figure 3 3 Constant gain circles and minimum noise figure circles 18 Figure 3 4 Proposed LNA architecture 19 Figure 3 5 The difference of Maxgain between Triple Cascode, Cascode, and Common-source topologies. 21 Figure 3 6 Transistor DC-IV curve 22 Figure 3-7 (a) (b)Topology of cascode 23 Figure 3 8 (a) without inductor (b) with 0.3 nH inductor 23 Figure 3 9 Combination of the adjacent inductors 24 Figure 3 10 The structure of the inductor 25 Figure 3 11 The Q factor of the inductor 26 Figure 3 12 The comparing example of conventional inductor and Quasi-Transformer 27 Figure 3 13 The comparison between conventional and Quasi-Transformer 27 Figure 3 14 Thin film micro-strip line 28 Figure 3 15 Low noise amplifier complete circuit architecture 29 Figure 3 16 Design flow chart 30 Figure 3 18 (a) (b) are the Pre-layout and Post-layout simulation of IP1dB and linearity 34 Figure 3 19 The circuit stability factor 35 Figure 3 20 Inter-stage stability (first stage- second stage) 36 Figure 3 21 The simulation of varying temperature 38 Figure 3 22 Simulation of varying supply voltage 38 LIST OF TABLES Table 3 1 The component and transistor value of the LNA 30 Table 3 2 Comparison between pre-sim and post-sim results 31 Table 3 3 The simulations of transistor in the best and worst corner 37 Table 3 4 Comparison table 39 | |
| dc.language.iso | en | |
| dc.title | 一個應用於K-band的低雜訊放大器 | zh_TW |
| dc.title | A Low Noise Amplifier with Quasi-Transformer Inductor for K-band Application | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 103-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 曹恆煒(Hen-Wai Tsao),黃俊郎(Jiun-Lang Huang) | |
| dc.subject.keyword | 毫米波電路,24GHz,低雜訊放大器,K-band,ISM Band,疊接組態, | zh_TW |
| dc.subject.keyword | MMIC,24GHz,LNA,ISM band,K-band,cascode, | en |
| dc.relation.page | 43 | |
| dc.rights.note | 未授權 | |
| dc.date.accepted | 2015-08-20 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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