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標題: | 用機器學習預測工程變更命令後的電路壓降 IR Drop Prediction of ECO-Revised Circuits Using Machine Learning |
作者: | Shih-Yao Lin 林士堯 |
指導教授: | 李建模(Chien-Mo Li) |
關鍵字: | 壓降分析,機器學習, power supply noise,IR drop analyzer,machine learning, |
出版年 : | 2016 |
學位: | 碩士 |
摘要: | 過大的電源供應雜訊(如壓降)會造成電路時序的錯誤,然而要模擬電源供應的雜訊需要很長的時間,尤其在電路設計的過程,會需要很多次的模擬。本論文提出了使用機器學習的方法建立一個工程變更命令前的預測模型,在電路工程變更命令後,我們使用之前的預測模型預測現在電路的壓降,由於改版前後的電路很相似,預測模型的誤差很小。電路中有非常多的邏輯閘,我們可以很輕易從電路中得到大量的資料給機器學習。我們提出了七個特徵抽取的方法,這些方法都是簡單並且能在大電路中實現。我們在三百萬邏輯閘工業用真實電路的實驗結果顯示,預測壓降的誤差僅有3.7mV,相關係數為0.55,並且加速了30倍。我們提出的方法可以省下非常多的電路壓降模擬時間。 Excessive power supply noise (PSN), such as IR drop, can cause timing violation in VLSI chips. However, simulation PSN takes a very long time, especially when multiple iterations is needed in IR drop signoff. In this thesis, we propose a machine learning technique to build an IR drop prediction model based on circuits before ECO (engineer change order) revision. After revision, we can re-use this model to predict the IR drop of the revised circuit. Because the previous circuit(s) and the revised circuit are very similar, the model can be applied with small error. Since there are many cells on a die, after each IR drop analysis, we can easily obtain many IR drop data to train the machine learning model. We proposed seven feature extractions, which are simple and scalable for large designs. Our experiment results show that prediction accuracy (average error 3.7mV) and correlation (0.55) are very high for a three million-gate real design. The run time speedup is up to 30X. The proposed method is very useful for designers to save the simulation time when fixing the IR drop problem. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/18856 |
DOI: | 10.6342/NTU201603790 |
全文授權: | 未授權 |
顯示於系所單位: | 電子工程學研究所 |
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ntu-105-1.pdf 目前未授權公開取用 | 1.86 MB | Adobe PDF |
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