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標題: | 透過閘極掘入技術之應用以改善HEMTs之操作特性與穩定度 Improvement of the electricity and operation properties of HEMTs through the application of gate recess technique |
作者: | Chia-Wei Pai 白家瑋 |
指導教授: | 管傑雄(Chieh-Hsiung Kuan) |
關鍵字: | 氮化鎵,高電子遷移率電晶體,臨界電壓,增強型, GaN,HEMT,Threshold Voltage,Enhancement mode, |
出版年 : | 2020 |
學位: | 碩士 |
摘要: | 在本篇論文中,我們以閘極掘入技術進行氮化鋁鎵/氮化鎵高電子遷移率電晶體的製作,首先以光阻進行製程上的改良及進一步縮小線寬,接著探討感應式耦合電漿蝕刻(ICP-RIE)對氮化鋁鎵之蝕刻速率,並以原子力顯微鏡(AFM)驗證蝕刻深度。量測數據顯示電晶體之臨界電壓(Vth)隨閘極掘入蝕刻時間而呈現正向偏移,對於閘極線寬400 nm的元件,我們將其臨界電壓偏移約1.9 V,仍然無法達到增強型(Enhancement mode)的操作。 同時,本實驗室研究不同磊晶結構對氮化鎵及元件之影響,研究結果發現氮化鋁(AlN)緩衝層可以減少氮化鎵差排密度,進而提升磊晶品質及後續元件電性表現,而從霍爾量測得知有氮化鋁緩衝層之結構二維電子氣濃度較大,使得原始臨界電壓較負,因此我們以相同蝕刻參數與時間對無氮化鋁緩衝層之結構進行閘極掘入製程,成功地使元件達到增強型操作。因此我們認為臨界電壓之大小通常在磊晶時即已確定,單一透過閘極掘入技術控制臨界電壓效果有限,本論文即利用感應耦合電漿蝕刻控制閘極掘入深度,達到控制臨界電壓之目的。 In this thesis, we focus on the fabrication of enhancement-mode AlGaN/GaN high-electron mobility transistors (HEMT) by gate recess technology. First of all, different photoresistance is used to improve process and further scaling gate length. Then, we discuss the etching rate of AlGaN from ICP-RIE, and AFM is used to confirm the recess depth. With the decrease of the AlGaN barrier layer, the threshold voltage of the device shifts positively and the current density decreases. The device is still normally-on even though the threshold voltage positively shift 1.9 V. In the meantime, study of the effect on device performance with different epitaxy structure is carried out by our group. The result indicates that AlN buffer layer can improve crystal quality of GaN. The Hall measurement shows that the structure with AlN buffer layer have higher carrier concentration and therefore threshold voltage has larger negative value. In order to reach the enhancement-mode operation, device is fabricated with the same gate recess process on structure without AlN layer. The origin value of threshold voltage is usually fixed with the epitaxy structure. As a result, it is hard to reach the e-mode operation simply by gate recess technique. The approach of shifting threshold voltage by ICP-RIE etching was confirmed in this study. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/16066 |
DOI: | 10.6342/NTU202002140 |
全文授權: | 未授權 |
顯示於系所單位: | 光電工程學研究所 |
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U0001-3107202000303700.pdf 目前未授權公開取用 | 11.23 MB | Adobe PDF |
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