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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/15720
標題: | 應用於Zigbee之低功率全數位鎖相迴路設計 Design of All-Digital Phase-Locked Loop with Low Power Time-to-Digital Converter for Zigbee Applications |
作者: | Keng-Yu Lin 林耿裕 |
指導教授: | 汪重光(Chorng-Kuang Wang) |
關鍵字: | 全數位鎖相迴路,低功率,時間數位轉換器, All digital phase locked loop,Low Power,TDC, |
出版年 : | 2012 |
學位: | 碩士 |
摘要: | 由於科技的不斷進步,元件尺寸及功率消耗持續地在下降,在單一晶片中,越來越多的功能區塊被包含進去,然而,隨著製程的演進,不理想的效應也伴隨著出現。類比元件面臨著元件特性的衰退,像是供給電壓的下降、漏電流的增加等等,因此,使用數位電路取代類比電路已成了一種趨勢。
2.4-GHz工業、科學以及醫療(ISM)頻帶被許多短距離無線通訊系統所使用,像是WLAN、Bluetooth以及Zigbee。近年來,鎖相迴路被廣泛地應用在有線及無線通訊系統之中,如同上述所提到的,全數位鎖相迴路更適合應用在先進的製程之中。因此,本論文提出一種使用低功率時間數位轉換器的全數位鎖相迴路。 在論文的一開始,會先分析此設計,並提出相對應的模型,緊接著會介紹電路如何實現。最後,本設計使用台積電0.18微米製程製造,而時間數位轉換器省下了66%的功率消耗。量測到的相位雜訊在1 MHz及10 MHz的頻率偏移下分別為-114 dBc/Hz和-118 dBc/Hz,量測到的均方根時脈抖動為0.64 ps。在1.8 V的供給電壓下量測到的功率消耗為14.1 mW。 Due to the progress in technology, device size and power consumption keep scaling down. Moreover, more and more function blocks are integrated in a single chip. However, there are also some non-ideal effects accompanied with the progressing CMOS technology. Analog devices suffer from the degrading characteristic such as decreasing supply voltage and increasing leakage current. Thus, it is a tendency that using digital circuits to replace analog circuits. The 2.4-GHz industrial, scientific and medical (ISM) band is utilized by various short-range wireless systems such as WLAN, Bluetooth and Zigbee. Recently, phase-locked loops (PLLs) are widely used in wireless and wireline communication. As mentioned above, all-digital phase-locked loops (ADPLLs) are more suitable for advanced technology. Thus, this thesis presents an all-digital phase-locked loop with low power time-to-digital (TDC) converter. The design is analyzed and modeled first, than the implantation is presented. Finally, the chip is fabricated in the TSMC 0.18 μm CMOS technology. The power consumption of TDC is reduced 66%. The measured phase noise are -114 dBc/Hz and -118 dBc/Hz at 1 MHz and 10 MHz offset, respectively and the rms jitter is 0.64 ps. The power consumption is 14.1 mW from 1.8 V supply voltage. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/15720 |
全文授權: | 未授權 |
顯示於系所單位: | 電子工程學研究所 |
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ntu-101-1.pdf 目前未授權公開取用 | 2.11 MB | Adobe PDF |
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