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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/104358完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然 | zh_TW |
| dc.contributor.advisor | Ching-Jan Chen | en |
| dc.contributor.author | 林承聖 | zh_TW |
| dc.contributor.author | Cheng-Sheng Lin | en |
| dc.date.accessioned | 2026-08-25T16:47:59Z | - |
| dc.date.available | 2026-08-26 | - |
| dc.date.copyright | 2026-08-25 | - |
| dc.date.issued | 2026 | - |
| dc.date.submitted | 2026-08-11 18:54:23 | - |
| dc.identifier.citation | [1] W. Wang, Y. Liu, J. Zhao, P. Zhang, and P. C. Loh, “A dynamic control method for buck + LLC cascaded converter with a wide input voltage range,” IEEE Trans. Power Electron., vol. 38, no. 2, pp. 1522–1533, Feb. 2023, doi: 10.1109/TPEL.2022.3208872.
[2] X. Sun, Y. Shen, Y. Zhu, and X. Guo, “Interleaved boost-integrated LLC resonant converter with fixed-frequency PWM control for renewable energy generation applications,” IEEE Trans. Power Electron., vol. 30, no. 8, pp. 4312–4323, Aug. 2015, doi: 10.1109/TPEL.2014.2358453. [3] H. Karneddi and D. Ronanki, “Analysis and design of a wide output voltage range battery charger for e-mobility applications,” IEEE J. Emerg. Sel. Topics Ind. Electron., vol. 5, no. 2, pp. 543–552, Apr. 2024, doi: 10.1109/JESTIE.2024.3363663. [4] A. Chub, D. Vinnikov, R. Kosenko, and E. Liivik, “Wide input voltage range photovoltaic microconverter with reconfigurable buck–boost switching stage,” IEEE Trans. Ind. Electron., vol. 64, no. 7, pp. 5974–5983, Jul. 2017, doi: 10.1109/ TIE.2016.2645891. [5] Delta Electronics, Inc., “H5E_220 grid-tied solar inverter user manual,” User manual, n.d.. Used for representative dc input-voltage specifications of a commercial 5.5 kVA PV inverter. [6] O. Zayed, A. Elezab, A. Abuelnaga, and M. Narimani, “A dual-active bridge converter with a wide output voltage range (200–1000 V) for ultrafast DC-connected EV charging stations,” IEEE Trans. Transp. Electrification, vol. 9, no. 3, pp. 3731–3741, Sep. 2023, doi: 10.1109/TTE.2022.3232560. [7] Shanghai Hangyu Power Technology Co., Ltd., “HY-LV123 series high-voltage ripple power supply for new energy vehicle testing,” Product brochure, n.d.. Secondary source summarizing proprietary OEM requirements aligned with LV123, LV124, VW80300, VW80303, and ISO 21498-2; no local PDF file is included. [8] P. Pescetto, M. F. Troncoso Cruz, F. Stella, and G. Pellegrino, “Galvanically isolated on-board charger fully integrated with 6-phase traction motor drives,” IEEE Access, vol. 11, pp. 26059–26069, Mar. 2023, doi: 10.1109/ACCESS.2023.3256266. [9] U. A. Khan, A. A. Khan, and J.-W. Park, “Single-stage single-phase isolated fullbridge buck–boost DC–AC inverters,” IEEE Open J. Ind. Appl., vol. 6, pp. 148–161, Mar. 2025, doi: 10.1109/OJIA.2025.3554485. [10] Q. Liu, Q. Qian, B. Ren, S. Xu, W. Sun, and L. Yang, “A two-stage buck–boost integrated LLC converter with extended ZVS range and reduced conduction loss for high-frequency and high- efficiency applications,” IEEE J. Emerg. Sel. Topics Power Electron., vol. 9, no. 1, pp. 727–738, Feb. 2021, doi: 10.1109/ JESTPE.2019.2956240. [11] Z. Hu, Y.-F. Liu, and P. C. Sen, “Bang–bang charge control for LLC resonant converters,” IEEE Trans. Power Electron., vol. 30, no. 2, pp. 1093–1108, Feb. 2015. [12] W. Feng, F. C. Lee, and P. Mattavelli, “Simplified optimal trajectory control (SOTC) for LLC resonant converters,” IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2415– 2426, May 2012, doi: 10.1109/TPEL.2012.2212213. [13] S. Tian, F. C. Lee, and Q. Li, “Equivalent circuit modeling of LLC resonant converter,” IEEE Trans. Power Electron., vol. 35, no. 8, pp. 8833–8848, Aug. 2020, doi: 10.1109/TPEL.2020.2967346. [14] D. Sha and X. Yang, “Wide voltage input full bridge (FB)/ half bridge (HB) morphing-based LLC DC/DC converter using numerical optimal trajectory control,” IEEE Trans. Ind. Electron., vol. 70, no. 4, pp. 3697–3707, Apr. 2023, doi: 10.1109/ TIE.2022.3177810. [15] P. Jia and M. Liu, “A wide range LLC resonant converter realized by an adjustable turns ratio transformer,” IEEE Trans. Power Electron., vol. 40, no. 8, pp. 10396–10407, Aug. 2025, doi: 10.1109/TPEL.2025.3561804. [16] D. Shu and H. Wang, “An adjustable turns ratio transformer based LLC converter for deeply- depleted PEV charging applications,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), New Orleans, LA, USA, 2020, pp. 860–865. [17] S. Qazi, P. Venugopal, A. J. Watson, P. Wheeler, and T. B. Soeiro, “A parallel input and versatile output dual active bridge converter,” IEEE Trans. Power Electron., vol. 40, no. 4, pp. 6203–6216, Apr. 2025, doi: 10.1109/TPEL.2024.3509529. [18] X. Tang, Y. Xing, H. Wu, K. Sun, and X. Ma, “An improved LLC resonant converter with phase-shift controlled dynamic series-parallel reconfiguration-windings for hold-up applications,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), Anaheim, CA, USA, 2019, pp. 791–796. [19] Z. Wang, Z. Wu, T. Liu, C. Chen, and Y. Kang, “A high-efficiency and high-powerdensity interleaved integrated buck-boost-LLC converter and its comprehensive optimal design method,” IEEE Trans. Power Electron., vol. 37, no. 9, pp. 10849–10862, Sep. 2022, doi: 10.1109/TPEL.2022.3164912. [20] Q. Qian, Q. Liu, H. Li, S. Xu, and W. Sun, “Optimal phase shift control strategy of buck-boost integrated LLC converter achieving wide input voltage range, MHzfrequency and high efficiency,” in Proc. IEEE Appl. Power Electron. Conf. Expo. (APEC), New Orleans, LA, USA, 2020, pp. 922–927. [21] Q. Liu, Q. Qian, and W. T. Ng, “A transient response control strategy with power compensation for GaN-based buck-boost LLC converters,” in Proc. China Int. Forum Solid State Lighting (SSLCHINA) / Int. Forum Wide Bandgap Semiconductors (IFWS), 2023, pp. 218–221. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/104358 | - |
| dc.description.abstract | 本文針對兩級式升降壓 LLC（Buck-Boost LLC, BBLLC）轉換器提出一種建 模與控制架構，以在寬輸入電壓範圍內實現優異的動態性能。本文建立了一套系統化的小訊號模型，用於分析升降壓（Buck-Boost）級對頻率響應之影響。此外，於補償網路中整合了陷波濾波器（Notch Filter），以精確抵消系統固有的無阻尼極點，有效抑制振盪並大幅提升相位裕度（Phase Margin）與整體穩定性。
為解決 vin 步階變化期間所導致之 vout 劇烈變動挑戰，本文導入輸入電壓前饋數位控制方法，顯著改善輸入電壓劇烈變動時的輸出電壓暫態調節能力。為實現可靠切換操作，本文推導精確之 Buck-Boost 電感電流 iLb 方程式，藉此進行死區時間 tdead 分析。此外，亦以解析方式建立零電壓切換（ZVS）與電壓增益邊界條件，為在所有操作模式下維持軟切換提供明確設計準則。最後，實作一台Pout = 200 W、Vin 為 70 V 至 400 V、Vout = 12 V 之原型機進行測試。實驗結果顯示，在 Vin 由 60 V 步階跳變至 90 V 之線電壓暫態測試下，輸出電壓過衝僅微幅變動 0.3 V。此外，所提方法不僅能在寬輸入電壓範圍內有效維持輸出穩壓，亦能於整個增益範圍內維持最佳化 ZVS 操作以實現高轉換效率，充分驗證本文理論模型、控制策略與設計準則之正確性與可行性。 | zh_TW |
| dc.description.abstract | This thesis proposes a modeling and control framework for a two-stage Buck-Boost LLC (BBLLC) converter to achieve superior dynamic performance across a wide input voltage range. A systematic small-signal model is developed to analyze the impact of the Buck-Boost stage on the frequency response. Furthermore, a notch filter is integrated into the compensation network to precisely counteract the undamped poles inherent in the system, effectively suppressing oscillations and significantly enhancing the phase margin and overall stability.
To address the challenge of severe vout fluctuations during vin steps, a digital linetransient feedforward control is implemented, substantially improving the transient regulation capability. To achieve reliable switching operation, precise Buck-Boost inductor current iLb equations are derived to conduct a theoretical deadtime analysis with tdead. Additionally, the zero-voltage switching (ZVS) and voltage gain boundary conditions are analytically established, providing clear design guidelines for maintaining soft switching across all operating modes. Finally, a Pout = 200 W prototype regulating Vout = 12 V from Vin = 70 V to 400 V is implemented for testing. Experimental results show that during a line transient step from Vin = 60 V to 90 V, the output voltage overshoot is limited to only 0.3 V. Furthermore, the proposed methodology not only effectively maintains output voltage regulation over this wide input-voltage range but also achieves high conversion efficiency by maintaining optimized ZVS operation across the entire gain range. These results fully verify the correctness and feasibility of the proposed theoretical models, control strategies, and design guidelines. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2026-08-25T16:47:59Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2026-08-25T16:47:59Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | Page
Verification Letter from the Oral Examination Committee i 致謝 iii 摘要 vii Abstract ix Contents xi List of Figures xv List of Tables xxi List of Symbols xxv Chapter 1 Introduction 1 1.1 Research Background and Motivation . . . . . . . . . . . . . . . . . 1 1.2 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.3 Research Objectives and Contributions . . . . . . . . . . . . . . . . 7 1.4 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Chapter 2 Steady-State Analysis 11 2.1 Circuit Topology and Operating Modes . . . . . . . . . . . . . . . . 11 2.2 Steady-State Analysis and Voltage Gain Derivation . . . . . . . . . . 16 2.2.1 Voltage Gain Derivation . . . . . . . . . . . . . . . . . . . . . . . 16 2.2.2 iLb0 Derivation and Piecewise iLb Formulas . . . . . . . . . . . . . 19 2.2.3 Sinusoidal Approximation of iLr and vCr . . . . . . . . . . . . . . . 23 2.3 Soft-Switching Condition Analysis . . . . . . . . . . . . . . . . . . 27 2.3.1 ZVS Mechanism and Dead-Time Model . . . . . . . . . . . . . . . 28 2.3.2 ZVS Conditions at the Four Switching Boundaries . . . . . . . . . . 31 2.3.3 Voltage Gain (Vin) Boundary Condition Analysis . . . . . . . . . . . 33 2.3.4 Control Platform Summary . . . . . . . . . . . . . . . . . . . . . . 34 Chapter 3 Small-Signal Modeling 37 3.1 Derivation of LLC Impedance ZLLC . . . . . . . . . . . . . . . . . . 37 3.1.1 Fourth-Order Impedance ZLLC(s) . . . . . . . . . . . . . . . . . . 39 3.1.2 Impedance Component Decomposition . . . . . . . . . . . . . . . . 40 3.1.3 Control-Oriented Approximation of ZLLC(s) . . . . . . . . . . . . 41 3.2 Derivation of Buck-Boost Small-Signal Model . . . . . . . . . . . . 43 3.3 Derivation of BBLLC Small-Signal Model . . . . . . . . . . . . . . 48 3.4 Small-Signal Model Parameters . . . . . . . . . . . . . . . . . . . . 51 Chapter 4 Control Strategy 53 4.1 Output Voltage Loop Compensator Design . . . . . . . . . . . . . . 54 4.1.1 Loop-Gain Formulation and Design Objectives . . . . . . . . . . . 54 4.1.2 Type-III Compensator . . . . . . . . . . . . . . . . . . . . . . . . . 55 4.1.3 Notch Filter for Buck–Boost Resonance Suppression . . . . . . . . 56 4.1.4 Composite Compensator and Loop-Gain Formulation . . . . . . . . 60 4.2 Input Feedforward Compensation . . . . . . . . . . . . . . . . . . . 61 4.2.1 Line-Disturbance Propagation and Feedback Limitation . . . . . . . 61 4.2.2 Feedforward Control Principle . . . . . . . . . . . . . . . . . . . . 62 4.3 Digital Control Implementation . . . . . . . . . . . . . . . . . . . . 64 4.3.1 AN9238 Dual-Channel ADC Module and FPGA Interface . . . . . 65 4.3.2 AC616 FPGA Platform and Resource Budget . . . . . . . . . . . . 68 4.3.3 FPGA Control Architecture . . . . . . . . . . . . . . . . . . . . . . 71 4.4 Discretization and Fixed-Point Implementation . . . . . . . . . . . . 73 4.4.1 Discretization of the Feedback Compensator . . . . . . . . . . . . . 74 4.4.2 Coefficient Quantization Considerations . . . . . . . . . . . . . . . 79 4.4.3 Cycle-Accurate and Frequency-Domain Verification . . . . . . . . . 81 4.4.4 Fixed-Point Implementation of the Input Feedforward Compensator 83 Chapter 5 Experimental Results 85 5.1 Hardware Prototype and Experimental Setup . . . . . . . . . . . . . 85 5.2 Steady-State Waveforms and ZVS Verification . . . . . . . . . . . . 88 5.2.1 Measured Steady-State Waveforms . . . . . . . . . . . . . . . . . . 88 5.2.2 ZVS Verification Method . . . . . . . . . . . . . . . . . . . . . . . 95 5.3 Dynamic Response Testing . . . . . . . . . . . . . . . . . . . . . . . 96 5.3.1 Measured Load Transient Response . . . . . . . . . . . . . . . . . 97 5.3.2 Measured Line Transient Response . . . . . . . . . . . . . . . . . . 100 5.3.3 Summary of Dynamic Performance . . . . . . . . . . . . . . . . . . 102 5.4 Efficiency Curves and Loss Analysis . . . . . . . . . . . . . . . . . 103 5.4.1 Efficiency Measurement Method . . . . . . . . . . . . . . . . . . . 103 5.4.2 Measured Efficiency Curves . . . . . . . . . . . . . . . . . . . . . 104 5.4.3 Loss Breakdown and Discussion . . . . . . . . . . . . . . . . . . . 106 5.4.3.1 Magnetic Component Losses . . . . . . . . . . . . . . 106 5.4.3.2 Secondary Rectifier Diode Losses . . . . . . . . . . . . 108 5.4.3.3 Primary MOSFET Conduction Losses . . . . . . . . . 109 5.4.3.4 Capacitor ESR Losses . . . . . . . . . . . . . . . . . . 110 5.4.3.5 Summary of the Quantified Loss Budget . . . . . . . . 111 Chapter 6 Conclusion and Future Work 113 6.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 6.2 Future Research Directions . . . . . . . . . . . . . . . . . . . . . . . 117 References 119 | - |
| dc.language.iso | en | - |
| dc.subject | BBLLC | - |
| dc.subject | LLC | - |
| dc.subject | FPGA | - |
| dc.subject | 軟切換 | - |
| dc.subject | 小訊號模型 | - |
| dc.subject | 數位控制 | - |
| dc.subject | BBLLC | - |
| dc.subject | LLC | - |
| dc.subject | FPGA | - |
| dc.subject | soft-switching | - |
| dc.subject | small-signal model | - |
| dc.subject | digital control | - |
| dc.title | 兩級式升降壓 LLC 諧振轉換器之數位控制與建模 | zh_TW |
| dc.title | Digital Control and Modeling of a Two-Stage Buck-Boost LLC Resonant Converter | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 114-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 黃顗融;陳偉倫 | zh_TW |
| dc.contributor.oralexamcommittee | YI-RONG HUANG;Woei-Luen Chen | en |
| dc.subject.keyword | BBLLC; LLC; FPGA; 軟切換; 小訊號模型; 數位控制 | zh_TW |
| dc.subject.keyword | BBLLC; LLC; FPGA; soft-switching; small-signal model; digital control | en |
| dc.relation.page | 122 | - |
| dc.identifier.doi | 10.6342/NTU202603908 | - |
| dc.rights.note | 同意授權(全球公開) | - |
| dc.date.accepted | 2026-08-12 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電機工程學系 | - |
| dc.date.embargo-lift | 2028-07-21 | - |
| 顯示於系所單位： | 電機工程學系 | |
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| ntu-114-2.pdf 此日期後於網路公開 2028-07-21 | 17.5 MB | Adobe PDF | ||
| ntu-114-2.pdf 此日期後於網路公開 2028-07-21 | 17.5 MB | Adobe PDF |
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