KY 電源轉換器之 控制電路架構與積體電路實現

Abstract

近年來，電子產品通常包含許多系統單晶片(SoC)。而每個SoC皆由多個子模組所構成，而這些子模組需要不同的直流電壓供電。傳統的方法是使用低壓差穩壓器(LDO)以及切換式穩壓器(例如:降壓轉換器)。然而，傳統切換式穩壓器在暫態響應、效率以及功率密度方面可能存在問題。因此，這些年許多研究提出混合式電源轉換器以改善上述問題。而KY電源轉換器則是其中一種混合式電源轉換器，相較於傳統切換式升壓轉換器，因為電感放置於輸出端，能量傳遞至輸出是連續的。除了輸出漣波較小以外，轉移函數中右半平面零點導致暫態響應緩慢等問題亦不存在。本論文將介紹兩種混合式KY電源轉換器: KY升壓轉換器以及KY升降壓轉換器。 第一個作品提出一種具有雙注入控制電路的KY升壓轉換器。與傳統電壓模式控制電路相比，雙注入控制電路能夠達到更快速的輸入電壓暫態響應。除此之外，此作品採用全NMOS功率開關以達到較小的晶片面積。此作品以台積電180奈米製程實現，整體晶片面積為1.1平方毫米。最高量測效率為92.95%。量測結果顯示當雙注入控制電路開啟時，輸入電壓變化所造成輸出電壓偏差可由80毫伏降低至36毫伏。相較於先前研究所提出的輸入電壓前饋控制電路，改善幅度超過200%。 第二個作品則聚焦於具有延伸脈波控制電路的KY升降壓轉換器。延伸脈波控制電路可以在轉換器操作模式切換時達到較小的輸出電壓變動且不需要額外操作模式。此晶片採用180奈米雙極-CMOS-DMOS (BCD)製程實現，最高量測效率為94.1%。量測結果顯示在採用延伸脈波控制電路時，操作模式切換期間輸出電壓波動可小於20毫伏，且無需額外的操作模式，增加電路設計難度。

Nowadays, system-on-chip (SoC) is usually embedded in the electronic products. A SoC consists of various sub-blocks which require different power domains. The conventional method is implemented by the low-dropout regulator (LDO) and the switching regulator such as the buck converter. However, traditional switching regulator may suffer from transient response, efficiency and power density issues. Therefore, hybrid power converters are proposed in these years to alleviate the issues mentioned above. KY power converter is one of the hybrid power converters. Compared with the traditional boost converter, the inductor of the KY power converter is placed at the output thereby causing the continuous energy delivery to the output. This not only reduces the output ripple but also eliminates the right half plane (RHP) zero existing at the transfer function which may deteriorate the transient response. Two hybrid power converters including the KY boost converter and the KY buck-boost converter will be introduced in this dissertation. In the first work, a KY boost converter with the double injection control is proposed. Compared with the conventional voltage mode control, the double injection control can achieve faster line transient response. Besides, all NMOS power switches are applied in this work to reduce the chip area. This chip was fabricated with TSMC 180 nm CMOS process and the overall chip area is 1.1mm2 including pads. The measured peak efficiency of this work is 92.95%. The measurement results show that when the proposed double injection control is enabled, the output voltage variation during line transition can be reduced by more than 200% from 80 mV to 36 mV compared with the input voltage feedforward control. The second work is focus on the KY buck-boost converter with the proposed extended ramp control. The proposed extended ramp control can achieve small output variation during mode and does not require additional operating mode. This chip was fabricated with TSMC 180 nm bipolar-CMOS-DMOS (BCD) process and the measured peak efficiency is 94.1%. The measured output fluctuation during mode transition is less than 20 mV without an extra mode when the proposed extended ramp control is utilized.