應用於 X 頻段低雜訊與 W/Ka 頻段高功率氮化鎵放大器設計之研究

Abstract

本論文提出了三個使用穩懋半導體公司（WIN Semiconductors）之氮化鎵（GaN）製程的晶片電路設計與開發，分別為 X 頻段低雜訊放大器、Ka 頻段與 W 頻段功率放大器。 第一部分 8 - 12 GHz 頻段的低雜訊放大器，本設計採用 0.25 μm GaN HEMT 製程實現。所提出的架構為三級低雜訊放大器，其中包含一級源極退化電感以及兩級採用 RC 回授技術，以達到寬頻操作性能。量測結果顯示，總功耗約為 770 mW，晶片面積約為 2.4 mm²。其 3-dB 頻寬範圍為 7.6 至 12.1 GHz，對應比例頻寬為 45.7%。在此頻段內，最大量測增益（|S21|）為 29.3 dB，平均雜訊指數約為 1.6 dB，最小值為 1.39 dB。 第二部分為 24 - 32 GHz 頻段的寬頻功率放大器，採用 0.12 μm GaN HEMT 製程實現。此電路採用兩級共源級架構，實現操作於 24 - 32 GHz 頻段之寬頻功率放大器，並利用電流合成（current combined）技術以提升整體輸出功率。此外，為了達成寬頻輸出匹配，設計中採用了磁耦合共振腔（MCR）來設計輸出匹配。為降低量測過程中的熱效應影響，亦導入散熱模組以提升整體電路性能。模擬結果顯示，在 24 - 32 GHz 範圍內，小訊號增益為 19 - 20.3 dB。飽和輸出功率（PSAT）介於 38.1 至 38.9 dBm，輸出增益 1 dB 壓縮點（OP1dB）介於 26.1 至 27.1 dBm，而最大功率附加效率（PAEmax）為 28.9% 至 36.3%。 第三部分為 95 GHz 頻段的功率放大器，採用 0.1 μm GaN HEMT 製程實現。電路架構採用四級共源級架構，並透過電流合成（current combined）技術以提升輸出功率。在輸出匹配設計上，採用低損耗阻抗傳輸線進行匹配，並特別著重於確保各級電晶體操作於其最佳負載阻抗，以最大化整體輸出性能。此外，為降低量測過程中熱效應的影響，亦導入散熱模組以提升電路整體性能。量測結果顯示，最大增益為 19.35 dB，3-dB 頻寬約為 98.4 - 101.3 GHz。在 98 - 102 GHz 範圍內，輸入損耗（|S11|）低於 -2.8 dB，輸出損耗（|S22|）低於 -5.7 dB。由於量測時輸入功率（Pin）未能達到使輸出進入飽和所需的功率，因此在量測範圍內的最大輸出功率（Pout）為 25.24 dBm，而在頻寬內的最小值為 22.41 dBm。最大輸出 1-dB 壓縮點（OP1dB）為 22.68 dBm，最小值為 19.82 dBm；對應增益範圍為 14.65 至 20.43 dB。最大功率附加效率（PAEmax）可達 9%，最小值為 4.89%。

This thesis presents the design of three circuits based on GaN processes from WIN Semiconductors, including an X-band low-noise amplifier, a Ka-band, and a W-band power amplifier (PA). The first part presents an X-band (8 - 12 GHz) LNA implemented using a 0.25 μm GaN HEMT process. The proposed architecture is a three-stage LNA consisting of one stage with source degeneration inductance and two stages employing RC feedback to achieve broadband performance. The measurement results show a total power consumption of approximately 770 mW and a chip area of about 2.4 mm². The measured 3-dB bandwidth ranges from 7.6 to 12.1 GHz, corresponding to a fractional bandwidth of 45.7%. Within this frequency band, the maximum measured gain (|S21|) is 29.3 dB, and the average noise figure is approximately 1.6 dB, with a minimum of 1.39 dB. The second part presents a wideband Ka-band (24 - 32 GHz) power amplifier implemented using a 0.12 μm GaN HEMT process. The circuit adopts a two-stage common-source topology, and current combining is employed to enhance the overall output power. In addition, a magnetically coupled resonator (MCR) network is utilized for broadband output matching. To mitigate thermal effects during measurement, a heat dissipation module is implemented. Simulation results show a peak gain of 19 - 20.3 dB across 24 - 32 GHz. The saturated output power (PSAT) ranges from 38.1 to 38.9 dBm, the output 1-dB compression point (OP1dB) ranges from 26.1 to 27.1 dBm, and the maximum power-added efficiency (PAEmax) ranges from 28.9 to 36.3%. The third part presents a W-band (95 GHz) wideband power amplifier implemented using a 0.1 μm GaN HEMT process. The circuit adopts a four-stage common-source topology with current combining to enhance output power. Low-loss impedance transmission lines are employed for output matching, with careful design to ensure each transistor operates at its optimal load impedance for maximum overall performance. A heat dissipation module is also implemented to reduce thermal effects during measurement. Measurement results show a maximum gain of 19.35 dB, with a 3-dB bandwidth of 98.4 - 101.3 GHz. Over 98 - 102 GHz, the input return loss (|S11|) is below −2.8 dB, and the output return loss (|S22|) is below -5.7 dB. Due to insufficient input power during measurement, saturation is not achieved. The maximum output power (Pout) is 25.24 dBm, with a minimum of 22.41 dBm within the bandwidth. The output 1-dB compression point (OP1dB) ranges from 19.82 to 22.68 dBm, with corresponding gain ranging from 14.65 to 20.43 dB. The maximum power-added efficiency (PAEmax) reaches 9%, with a minimum of 4.89%.