請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101711完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然 | zh_TW |
| dc.contributor.advisor | Ching-Jan Chen | en |
| dc.contributor.author | 莊心慈 | zh_TW |
| dc.contributor.author | Hsin-Tzu Chuang | en |
| dc.date.accessioned | 2026-02-26T16:55:02Z | - |
| dc.date.available | 2026-02-27 | - |
| dc.date.copyright | 2026-02-26 | - |
| dc.date.issued | 2026 | - |
| dc.date.submitted | 2026-01-29 | - |
| dc.identifier.citation | EJ. Delaine, P.-O. Jeannin, D. Frey and K. Guepratte, "High frequency DC-DC converter using GaN device," Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition, Orlando, FL, USA, 2012, pp. 1754-1761.
G. -J. Su, "Comparison of Si, SiC, and GaN based Isolation Converters for Onboard Charger Applications," IEEE Energy Conversion Congress and Exposition, Portland, OR, USA, 2018, pp. 1233-1239. EPC: AN003, “Using Enhancement Mode GaN-on Silicon Power FETs (eGaN FETs),” 2023. [Online]. Available: https://epc-co.com/epc/Portals/0/epc/documents/product-training/AN003%20Using%20Enhancement%20Mode%20GaN-on-Silicon.pdf. EPC: “48 V DC-DC Conversion for Data Centers Using GaN Transistors,” 2022. [Online]. Available: https://epc-co.com/epc/about-epc/events-and-news/apec-2022/48-v-gan-evolution. EPC: WP105, “eGaN FETS in High-Frequency Resonant Converters,” 2020. [Online]. Available: https://epc-co.com/epc/Portals/0/epc/documents/papers/eGaN%20FETS%20in%20High%20Frequency%20Resonant%20Converters.pdf. E. A. Jones, F. F. Wang, and D. Costinett, "Review of Commercial GaN Power Devices and GaN-Based Converter Design Challenges," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 4, no. 3, pp. 707-719, Sept. 2016. EPC, “EPC2619: 100 V, 4.2 mΩ Enhancement Mode GaN Power Transistor,” Datasheet, Aug 2024. [Online]. Available: https://epc-co.com/epc/portals/0/epc/documents/datasheets/ EPC2619_datasheet.pdf. W. Lee, D. Han, W. Choi and B. Sarlioglu, "Reducing reverse conduction and switching losses in GaN HEMT-based high-speed permanent magnet brushless dc motor drive," IEEE Energy Conversion Congress and Exposition, Cincinnati, OH, USA, 2017, pp. 3522-3528. S.-T. Li, A Gate Driver IC for GaN-Based Synchronous Buck Converter, M.S. thesis, Dept. Elect. Eng., National Taiwan University, Taipei, Taiwan, 2020. M. Alam, "Enhancement vs Cascode Gallium Nitride MOSFET: A Comparative Analysis," IEEE 3rd Industrial Electronics Society Annual Online Conference, Beijing, China, 2024, pp. 1-4. B.-D. Choi, “Enhancement of current driving capability in data driver ICs for plasma display panels,” IEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 992-997, 2009 Y.-C. Chang, A Gate Driver IC with Bootstrap Voltage Compensation Technology for GaN-Based Synchronous Buck Converter, M.S. thesis, Dept. Electron. Eng., National Taiwan University, Taipei, Taiwan, 2023. F. Wolfgang and Z. Ziqing, "Turn-on performance comparison of current-source vs. voltage-source gate drivers," presented at the PSMA Technical Forum, 2018. [Online]. Available: https://www.psma.com/sites/default/files/uploads/tech-forums-safety-compliance/presentatio-ns/is041-turn-performance-comparison-current-source-vs-voltage-source-gate-drivers.pdf. A. Schindler, B. Koeppl, A. Pottbaecker, M. Zannoth, and B. Wicht, "Gate driver with 10/15ns in-transition variable drive current and 60% reduced current dip, "42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 2016, pp. 325-328. Huang, Hong. "Designing an LLC resonant half-bridge power converter," Texas Instruments Power Supply Design Seminar, SEM1900, Topic. Vol. 3. 2010. T. S. Bheemraj, K. Babu, M. Rafi, A. K G and S. J. T G, "Influence of Magnetizing Inductance and Dead Time in the Performance of Half-Bridge LLC Resonant Converter," IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy, Trivandrum, India, 2023, pp. 1-6. X. Ke, J. Sankman, M. K. Song, P. Forghani, and D. B. Ma, "16.8 A 3-to-40V 10-to-30MHz automotive-use GaN driver with active BST balancing and VSW dual-edge dead-time modulation achieving 8.3% efficiency improvement and 3.4ns constant propagation delay," IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 2016, pp. 302-304. Mi Zhou, Qiongwei Low, and L. Siek, "A high efficiency synchronous buck converter with adaptive dead-time control," International Symposium on Integrated Circuits, Singapore, 2016, pp. 1-4. C. -J. Chen, P. -K. Chiu, Y. -M. Chen, P. -Y. Wang and Y. -C. Chang, "An Integrated Driver with Adaptive Dead-Time Control for GaN-Based Synchronous Buck Converter," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 2, pp. 539-543, Feb. 2022. R. P. Singh, N. Neelakantan, C. J. Leo, and N. Yoshio, "Design and Evaluation of High-frequency GaN-Based DC/DC Converter," 2019 IEEE 4th International Future Energy Electronics Conference, Singapore, 2019, pp. 1-4. C. -J. Chen, P. -Y. Wang, S. -T. Li, Y. -M. Chen and Y.-C. Chang, "An Integrated Driver with Bang-Bang Dead-Time Control and Charge Sharing Bootstrap Circuit for GaN Synchronous Buck Converter," in IEEE Transactions on Power Electronics, vol. 37, no. 8, pp. 9503-9514, Aug. 2022. M. S. Qureshi et al., "Effects of Parasitic Elements in High Frequency GaN-based DC-DC Converters for Electric Vehicle Applications," 25th International Multitopic Conference, Lahore, Pakistan, 2023, pp. 1-6. C. Song, S. Yin, J. Lin, and H. Li, "Impact of Circuit Mismatches and Parasitic Parameters on Paralleling 650-V E-Mode GaN HEMTs," IEEE 10th International Power Electronics and Motion Control Conference, Chengdu, China, 2024, pp. 4150-4154. W. Lee, D. Han, W. Choi and B. Sarlioglu, "Reducing reverse conduction and switching losses in GaN HEMT-based high-speed permanent magnet brushless dc motor drive," IEEE Energy Conversion Congress and Exposition, Cincinnati, OH, USA, 2017, pp. 3522-3528. EPC: WP015, “Dead-Time Optimization for Maximum Efficiency,” 2020. [Online]. Available: https://epc-co.com/epc/Portals/0/epc/documents/papers/Dead-Time%20Optimization%20for %20Maximum%20Efficiency.pdf. T.-Y. Lin, A DCM Compatible Pi-Type Dual-Path Hybrid Buck Converter with Adaptive On-Time Control, M.S. thesis, Dept. Electron. Eng., National Taiwan University, Taipei, Taiwan, 2025. L. Wang, Y. Yan, S. Zhi, M. Ma, X. Sun, and D. Xu, "An Active Gate Driver Addressing GaN HEMT Gate-Source Voltage Overshoots for Both Turn-on and Turn-off Periods," IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia, Beijing, China, 2025, pp. 1-5. Z. Zeng, P. Cao, S. Lam, and M. Cui, "A 48 V/1 MHz Monolithic GaN DC-DC Buck Converter with Sub-20-ns Dead-Time Control," 9th International Conference on Integrated Circuits and Microsystems, Wuhan, China, 2024, pp. 730-734. C. Tang, M. Jiang, and P. Zhao, "An Adaptive Dual Step Control Dead-Time Circuit for Gallium Nitride Half-Bridge," 7th International Conference on Integrated Circuits and Microsystems, Xi'an, China, 2022, pp. 67-71. Y. Long, W. Zhang, B. Blalock, L. Tolbert, and F. Wang, "A 10-MHz Resonant Gate Driver Design for LLC Resonant DC-DC Converters Using GaN Devices," IEEE Applied Power Electronics Conference and Exposition, Fort Worth, TX, USA, 2014, pp. 2093-2097. C. Sun, Q. Sun, R. Wang, Y. Li, and D. Ma, "Adaptive Dead-Time Modulation Scheme for Bidirectional LLC Resonant Converter in Energy Router," in CSEE Journal of Power and Energy Systems, vol. 10, no. 4, pp. 1710-1721, July 2024. Y. Wei, Q. Luo, Z. Wang and H. A. Mantooth, "Simple and Effective Adaptive Deadtime Strategies for LLC Resonant Converter: Analysis, Design, and Implementation," in IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 10, no. 2, pp. 1548-1562, April 2022. H. -T. Chuang, Y. -M. Chen, Y. -C. Lin, C. -J. Chen and F. -M. Hsu, "A Current Mode Gate Driver with Gate Ringing Suppression for GaN-Based LLC Converter," IEEE Energy Conversion Conference Congress and Exposition, Philadelphia, PA, USA, 2025, pp. 1-5. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101711 | - |
| dc.description.abstract | 氮化鎵高電子遷移率電晶體憑藉其優異的切換特性,已成為實現高頻與高功率密度轉換器的關鍵技術。然而,要充分發揮氮化鎵元件的潛力,面臨著嚴峻的驅動挑戰。氮化鎵極快的切換速度與電路寄生電感交互作用,容易引發嚴重的閘極電壓振鈴;考慮到氮化鎵嚴格的閘極崩潰電壓限制,這嚴重威脅了元件的可靠度。此外,在如 LLC 等諧振拓撲中,傳統的固定死區時間設定往往導致過長的反向導通損耗或災難性的直通電流。現有的數位自適應解決方案通常存在收斂速度慢的問題,且缺乏實現完整軟切換管理所需的高側偵測能力。
為解決上述問題,本論文提出了一款全整合式閘極驅動晶片。本首先,本論文提出了一種閘極振鈴抑制機制。該機制透過具有自終止特性的高側電流模式架構實現,能夠主動抑制寄生振盪,從而在不增加靜態功耗的情況下實現可靠運作。其次,提出了雙邊自適應死區時間控制技術。透過即時檢測開關轉換,該控制器逐週期優化死區時間,有效消除直通風險並最大限度地降低體反向導通損耗。 本論文之晶片採用 TSMC 0.18 µm HV BCD 製程。基於 500 kHz、120 W 48V 轉 12V 規格之氮化鎵 LLC 轉換器設計,量測結果驗證了閘極振鈴抑制的效能;在 48V 輸入條件下,本設計無需外部阻尼電阻即成功消除了振盪。此外,在降壓測試條件下,自適應死區控制器在不同負載中皆能成功調節死區時間,與傳統固定死區方案相比,顯著提升了系統效率與可靠度。 | zh_TW |
| dc.description.abstract | Gallium Nitride (GaN) HEMTs have become a key technology for high-frequency converters due to their superior switching characteristics. However, driving GaN devices presents significant challenges. The high switching speed, coupled with parasitic inductances, often induces severe gate ringing. Furthermore, in LLC resonant converters, fixed dead-time settings typically result in excessive reverse conduction losses or catastrophic shoot-through. Existing adaptive solutions often suffer from slow convergence and lack the necessary high-side sensing capability.
To address these, this thesis presents a fully integrated gate driver. First, a gate ringing suppression mechanism is proposed. Implemented via a high-side current-mode architecture with self-termination, this design actively damps parasitic oscillations, achieving reliable operation without static power dissipation. Second, a dual-sided adaptive dead-time control (ADTC) technique is introduced. By detecting switching transitions in real-time, the controller optimizes the dead-time duration cycle-by-cycle, effectively eliminating shoot-through risks and minimizing reverse conduction losses. The proposed chip is fabricated using TSMC 0.18-μm HV BCD technology. Experimental results from a 500 kHz, 120 W 48V to 12V GaN-based LLC resonant converter design validate the efficacy of gate ringing suppression; at 48 V input, the proposed architecture successfully eliminates oscillations without the need for external damping resistors. Additionally, the adaptive controller is verified under scaled-down operating conditions to successfully regulate dead-time across different loads, significantly improving efficiency and reliability compared to fixed dead-time solutions. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2026-02-26T16:55:02Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2026-02-26T16:55:02Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 致謝 I
中文摘要 III Abstract IV Table of Contents V List of Figures VII List of Tables X Chapter 1 Introduction 1 1.1 Research Background 1 1.2 Thesis Motivation 5 1.3 Thesis Contributions 9 1.4 Thesis Outline 10 Chapter 2 Review of Gate Driver for GaN Devices 12 2.1 Brief Review of GaN Devices 12 2.2 Review of Level Shifter and Challenges 15 2.2.1 Open-Drain Level Shifter 15 2.2.2 Conventional Floating Voltage Level Shifter 16 2.3 Turn-on Performance Comparison of Various Drivers 18 2.4 Review of Dead-Time Control 22 2.4.1 Fixed Dead-Time Control 23 2.4.2 Review of Adaptive Dead-Time Control 27 2.5 Summary 32 Chapter 3 Concept of Proposed Gate Driver IC 33 3.1 System Architecture of Gate Driver IC 33 3.2 Concept of High-Side Current Mode Driving 35 3.3 Concept of Adaptive Dead-Time Control 40 3.4 Summary 45 Chapter 4 Circuit Implementation 46 4.1 High-Voltage Level Shifter 46 4.2 Current Control Current Source 49 4.3 Low-Side Driver Stage 52 4.4 Adaptive Dead-Time Control Block 54 4.4.1 Reverse Conduction Sensing 55 4.4.2 Time-To-Digital Converter 58 4.4.3 5-Bit Adder-Subtractor 61 4.4.4 5-Bit Adaptive Dead-Time 64 4.5 Summary 65 Chapter 5 Measurement Results 67 5.1 Chip Overview 67 5.2 Printed Circuit Board (PCB) Design 72 5.3 Measurement Results 76 5.3.1 High-Side Gate Ringing Suppression Verification 76 5.3.2 Verification of Adaptive Dead-Time Control 78 5.4 Comparison Table 81 Chapter 6 Conclusions and Future Works 83 6.1 Conclusions 83 6.2 Future Works 83 References 86 | - |
| dc.language.iso | en | - |
| dc.subject | 氮化鎵 | - |
| dc.subject | 閘極驅動器 | - |
| dc.subject | 閘極振鈴抑制 | - |
| dc.subject | 自適應死區時間控制 | - |
| dc.subject | LLC 諧振轉換器 | - |
| dc.subject | 零電壓切換 | - |
| dc.subject | Gallium Nitride (GaN) | - |
| dc.subject | Gate Driver | - |
| dc.subject | Gate Ringing Suppression | - |
| dc.subject | Adaptive Dead-Time Control (ADTC) | - |
| dc.subject | LLC Resonant Converter | - |
| dc.subject | Zero-Voltage Switching (ZVS) | - |
| dc.title | 適用於氮化鎵LLC諧振轉換器之具有閘極振鈴抑制及可調式空白時間控制之閘極驅動積體電路 | zh_TW |
| dc.title | A Gate Driver IC with Gate Ringing Suppression and Adaptive Dead-Time Control for GaN-Based LLC Resonant Converter | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 114-1 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 陳耀銘;蘇昱丞;黃顗融 | zh_TW |
| dc.contributor.oralexamcommittee | Yaow-Ming Chen;Yu-Chen Su;Yi-Rong Huang | en |
| dc.subject.keyword | 氮化鎵,閘極驅動器閘極振鈴抑制自適應死區時間控制LLC 諧振轉換器零電壓切換 | zh_TW |
| dc.subject.keyword | Gallium Nitride (GaN),Gate DriverGate Ringing SuppressionAdaptive Dead-Time Control (ADTC)LLC Resonant ConverterZero-Voltage Switching (ZVS) | en |
| dc.relation.page | 88 | - |
| dc.identifier.doi | 10.6342/NTU202600439 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2026-02-02 | - |
| dc.contributor.author-college | 重點科技研究學院 | - |
| dc.contributor.author-dept | 積體電路設計與自動化學位學程 | - |
| dc.date.embargo-lift | N/A | - |
| 顯示於系所單位: | 積體電路設計與自動化學位學程 | |
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| ntu-114-1.pdf 未授權公開取用 | 7.32 MB | Adobe PDF |
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