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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101581完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林招松 | zh_TW |
| dc.contributor.advisor | Chao-Sung Lin | en |
| dc.contributor.author | 陳吟瑄 | zh_TW |
| dc.contributor.author | Yin-Hsuan Chen | en |
| dc.date.accessioned | 2026-02-11T16:31:30Z | - |
| dc.date.available | 2026-02-12 | - |
| dc.date.copyright | 2026-02-11 | - |
| dc.date.issued | 2026 | - |
| dc.date.submitted | 2026-02-03 | - |
| dc.identifier.citation | [1] B. H. Amstead, P. F. Ostwald, and M. L. Begeman, "Manufacturing processes," (No Title), 1987.
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/101581 | - |
| dc.description.abstract | 本研究旨在探討於矽晶片上成長奈米孿晶銀薄膜之低溫固晶接合技術及其封裝應用，以提升元件之可靠度與性能。隨著電動車、再生能源轉換系統與高頻通訊等領域對高功率與高頻操作之需求增加，封裝材料與製程需朝向高可靠度與低製程溫度發展。目前業界多採銲錫或銀燒結作為固晶接合方式，然而傳統銲錫之工作溫度較低，限制其於高溫環境下之可靠度，而銀燒結製程雖具備優異的導熱與導電性，但仍可能因孔洞率高導致界面不穩定，進而影響元件的長期電性表現。此外，固晶過程若採用過高的溫度，易造成晶片功能劣化，若於晶片與基板間引入中間層，亦可能增加熱應力與界面脆弱區，提升失效風險。因此，本研究聚焦於低溫直接接合技術，以兼顧低溫製程需求與高溫操作環境下之熱穩定性。
本研究採用濺鍍與電子束蒸鍍兩種乾式製程沉積奈米孿晶銀薄膜。於濺鍍製程中，透過調整濺鍍功率、基板偏壓以及薄膜厚度等參數，可製備具有良好附著性之銀薄膜，並在適當條件下形成柱狀結構奈米孿晶銀薄膜。於蒸鍍製程中，藉由離子束輔助可提升能量輸入，進而形成高度<111>擇優取向的銀奈米孿晶薄膜。由於面心立方 (FCC) 金屬之(111)面具有快速擴散的特性，且奈米孿晶結構同時具備高機械強度及良好的熱穩定性，使其成為低溫固晶接合之潛力材料。 實驗結果顯示，濺鍍製程所製備之銀奈米孿晶銀薄膜能有效提升接合品質，並在不同DBC基板與接合參數下，於低溫 (<250 °C) 接合後可使接合界面孔洞顯著降低或消除，且平均剪切強度最高可達到38 MPa。當銀薄膜具有較高比例之<111>取向奈米孿晶時，可提升原子擴散速率並加速孔洞消除，使界面緻密化。此外，接合前之電漿清潔可有效提升表面潔淨度與初始接觸活化，有助於在較低溫條件下達成更完整之接合。 在電性驗證方面，透過晶圓針測比較接合前後晶片之表現，結果顯示其閾值電壓 (Vth)、汲極–源極崩潰電壓 (BVDSS) 以及汲極漏電流 (IDSS) 之平均值皆維持於產品規格範圍內，顯示低溫固晶接合製程未造成晶片電性造成劣化，亦確保了元件的可靠性。綜合而言，本研究證實銀奈米孿晶薄膜可成功應用於低溫直接固晶接合，展現其於功率模組封裝之應用潛力，並為未來低溫、高可靠度封裝材料與製程提供可行方案。 | zh_TW |
| dc.description.abstract | This study investigates low-temperature die bonding utilizing nanotwinned Ag thin films grown on Si chips, and evaluates its potential for enhancing device reliability and performance. With the continuous rise in demand for high-power and high-frequency electronic devices, particularly in electric vehicles, renewable energy conversion systems, and high-frequency communication, innovations in packaging materials and processes and are increasingly important. Conventional die-attach approaches commonly rely on soldering or Ag sintering. However, the relatively low service temperature of solder limits the reliability under high-temperature operation, whereas Ag sintering, despite its excellent thermal and electrical conductivity, may exhibit interfacial porosity that compromises interfacial integrity and long-term electrical stability. In addition, excessive bonding temperatures can degrade device functionality, and introducing intermediate layers between the chip and the substrate may increase thermomechanical stress and create interfacial weak regions, thereby elevating the risk of failure. To address these issues, this study focuses on low-temperature direct bonding while aiming to maintain the thermal stability of the bonded structure for reliable operation under harsh conditions.
Nanotwinned Ag thin films were deposited via two dry processes: magnetron sputtering and electron-beam evaporation. In the sputtering process, the effects of sputtering power, substrate bias, and film thickness were systematically investigated to obtain Ag films with strong adhesion and columnar nanotwinned microstructures. In the evaporation process, ion-beam assistance was introduced to facilitate the formation of highly <111>-oriented nanotwinned Ag films. Leveraging the fast diffusion characteristics associated with the FCC (111) plane, together with the high strength and thermal stability of the nanotwinned structure, these films were employed as candidate metallizations for low-temperature direct bonding. The experimental results demonstrate that nanotwinned Ag films significantly improved bonding quality. Under various DBC substrates and bonding conditions, low-temperature bonding (<250 °C) resulted in interfaces with drastically reduced or nearly eliminated voids, achieving an average shear strength of 38 MPa. In particular, Ag films with a high fraction of <111>-oriented nanotwins exhibited enhanced atomic diffusion, which promoted void closure and resulted in a denser bonding interface. Moreover, plasma cleaning prior to bonding improved surface activation during the early bonding stage, enabling high-quality bonding at reduced temperatures. Electrical characterization using chip probe (CP) tests confirmed that the threshold voltage (Vth), drain–source breakdown voltage (BVDSS), and drain leakage current (IDSS) remained within product specifications before and after bonding. These results indicate that the low-temperature die bonding process does not deteriorate the device electrical performance and supports reliable operation. Overall, this study demonstrates that nanotwinned Ag thin films are a promising route for low-temperature direct die bonding in power module packaging and provide a feasible pathway for future materials and process development. | en |
| dc.description.provenance | Submitted by admin ntu (admin@lib.ntu.edu.tw) on 2026-02-11T16:31:30Z No. of bitstreams: 0 | en |
| dc.description.provenance | Made available in DSpace on 2026-02-11T16:31:30Z (GMT). No. of bitstreams: 0 | en |
| dc.description.tableofcontents | 目 次
口試委員會審定書 I 致謝 II 摘要 IV ABSTRACT VI 目 次 VIII 圖 次 XIII 表 次 XXIII 第一章 緒論 1 1.1 研究背景與動機 1 1.2 功率模組封裝需求 4 1.3 固晶接合技術與挑戰 5 1.4 研究目的 8 第二章 文獻探討 10 2.1 功率元件晶背金屬化 10 2.2 低溫與高可靠度固晶接合之研究趨勢 12 2.3 傳統固晶接合技術之挑戰及極限 12 2.3.1 銲錫與高溫可靠度問題 12 2.3.2 固液擴散接合 (Solid Liquid Interdiffusion Bonding, SLID) 14 2.3.3 銀燒結固晶接合 (Silver Sintering) 16 2.4 傳統金屬強化機制及其侷限 18 2.4.1 細化晶粒強化 (Strengthening of Grain Size Reduction) 18 2.4.2 固溶強化 (Solid-Solution Strengthening) 20 2.4.3 應變強化 (Strain Hardening) 21 2.4.4 傳統強化機制的局限性 22 2.5 奈米孿晶結構的優勢與製備 22 2.5.1 孿晶界 (Twin boundary) 性質 23 2.5.2 孿晶的形成方式 26 2.5.2.1 退火孿晶 (Annealing Twin) 26 2.5.2.2 機械孿晶 (Deformation Twin) 27 2.5.2.3 生長孿晶 (Growth Twin) 29 2.5.3 銀材料的選擇及低疊差能優勢 30 2.5.4 奈米孿晶的機械性質 31 2.5.5 奈米孿晶的製備 35 2.5.5.1 電鍍 (Electrodeposition) 35 2.5.5.2 濺鍍 (Sputtering) 38 2.5.5.3 蒸鍍 (Evaporation) 41 2.6 奈米孿晶低溫固晶接合 43 2.6.1 奈米孿晶銅在銅互連 (Interconnect) 中的應用 43 2.6.2 奈米孿晶結構對擴散接合的機制 46 2.6.3 奈米孿晶銀的固晶接合應用 47 第三章 實驗方法 50 3.1 實驗流程 50 3.2 實驗材料與試片預處理 51 3.2.1 矽基板及預處理流程 51 3.2.2 接合基板及預處理流程 51 3.2.2.1 直接覆銅 (Direct Bonded Copper, DBC) 基板 52 3.2.2.2 印刷電路板 (Printed Circuit Board, PCB) 52 3.3 實驗設備 53 3.3.1 磁控射頻濺鍍系統 (Magnetron RF Sputtering System) 53 3.3.1.1 濺鍍靶材 54 3.3.1.2 濺鍍製程及參數 54 3.3.2 離子輔助電子束蒸鍍系統 (Ion Beam Assisted Electron Beam Evaporation, IBAE) 57 3.3.3 真空熱壓機 59 3.3.4 五噸真空熱壓機 62 3.3.5 研磨拋光設備及製程 63 3.4 材料分析儀器 64 3.4.1 聚焦離子束與電子束顯微系統 (Dual Beam Focused Ion Beam) 64 3.4.2 穿透式電子顯微鏡 (Transmission Electron Microscopy, TEM) 65 3.4.3 場發射槍掃描式電子顯微鏡 (Field Emission Scanning Electron Microscopy, FESEM) 與EBSD分析 66 3.4.4 高功率X光繞射分析儀 (X-Ray Diffraction, XRD) 67 3.4.5 原子力顯微鏡 (Atomic Force Microscopy, AFM) 68 3.4.6 接合強度剪切試驗 69 3.4.7 奈米壓痕儀 (Nanoindentation) 分析 70 3.4.8 四點探針 (Four point probe) 70 第四章 實驗結果與討論 72 4.1 濺鍍銅薄膜性質分析 72 4.1.1 濺鍍銅薄膜結構分析 72 4.1.2 濺鍍銅薄膜晶格取向分析 78 4.1.3 濺鍍銅薄膜電阻率分析 81 4.2 濺鍍銀薄膜性質分析 83 4.2.1 薄膜附著性分析 83 4.2.2 薄膜鍍率分析 83 4.2.3 薄膜鍍層結構分析 86 4.2.4 晶格取向分析 90 4.2.5 晶粒尺寸分析 97 4.2.6 薄膜厚度對其性質影響 100 4.2.7 表面粗糙度分析 109 4.2.8 穿透式電子顯微鏡分析 109 4.2.9 薄膜硬度分析 113 4.3 蒸鍍銀薄膜性質分析 116 4.3.1 蒸鍍八吋矽晶圓薄膜分析 116 4.3.2 蒸鍍八吋矽晶圓薄膜晶格取向分析 119 4.3.3 濺鍍與蒸鍍製程中奈米孿晶成長機制之比較與討論 129 4.4 奈米孿晶銀薄膜低溫接合 132 4.4.1 奈米孿晶銀薄膜之低溫直接接合 132 4.4.2 矽晶片與DBC基板之低溫固晶接合 136 4.4.2.1 裸銅DBC基板之接合 136 4.4.2.2 ENEPIG DBC基板之接合 140 4.4.2.3 高比例奈米孿晶對接合結果之影響 144 4.4.2.4 表面電漿清潔對接合結果之影響 149 4.4.2.5 高比例奈米孿晶與電漿清潔 154 4.4.3 低溫接合電性驗證 158 第五章 結論 165 參考文獻 167 | - |
| dc.language.iso | zh_TW | - |
| dc.subject | 直接接合 | - |
| dc.subject | 優選取向 | - |
| dc.subject | 低溫固晶接合 | - |
| dc.subject | 功率模組 | - |
| dc.subject | 奈米孿晶銀 | - |
| dc.subject | 電性表現 | - |
| dc.subject | Direct bonding | - |
| dc.subject | Preferred orientation | - |
| dc.subject | Low temperature die bonding | - |
| dc.subject | Power modules | - |
| dc.subject | Nanotwinned Ag | - |
| dc.subject | Electrical performance | - |
| dc.title | 矽晶片成長奈米孿晶銀薄膜及其低溫固晶接合應用 | zh_TW |
| dc.title | Growth of Ag Nanotwinned Films on Silicon Chips and the Applications for Low Temperature Die Bonding | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 114-1 | - |
| dc.description.degree | 博士 | - |
| dc.contributor.oralexamcommittee | 莊東漢;陳勝吉;張世穎;王彰盟;鄭明達;張景堯;陳蓉萱;李攸軒 | zh_TW |
| dc.contributor.oralexamcommittee | Tung-Han Chuang;Sheng-Chi Chen;Shih-Ying Chang;Jang-Meng Wang;Ming-Da Cheng;Jing-Yao Chang;Jung-Hsuan Chen;Yu-Hsuen Lee | en |
| dc.subject.keyword | 直接接合,優選取向低溫固晶接合功率模組奈米孿晶銀電性表現 | zh_TW |
| dc.subject.keyword | Direct bonding,Preferred orientationLow temperature die bondingPower modulesNanotwinned AgElectrical performance | en |
| dc.relation.page | 184 | - |
| dc.identifier.doi | 10.6342/NTU202600398 | - |
| dc.rights.note | 同意授權(限校園內公開) | - |
| dc.date.accepted | 2026-02-04 | - |
| dc.contributor.author-college | 工學院 | - |
| dc.contributor.author-dept | 材料科學與工程學系 | - |
| dc.date.embargo-lift | 2031-01-27 | - |
| 顯示於系所單位： | 材料科學與工程學系 | |
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