基於 FPGA 之 GRDPWM 演算法硬體最佳化與音訊應用實作

Abstract

傳統數位脈寬調變（Pulse Width Modulation, PWM）在功率放大器（Power Amplifier, PA）應用中，常因 Gibbs 現象與混疊效應而產生時間域漣波，進而導致非線性失真、輸出效率下降以及音質劣化。為解決此問題，Gibbs-Phenomenon-Reduced Digital PWM（GRDPWM）演算法透過部分傅立葉級數搭配濾波器設計，有效降低時間域漣波，使脈衝訊號更能抵抗非線性 PA 所引發的失真。然而，傳統 GRDPWM 的實現需仰賴大量三角函數與乘法運算，在 FPGA（Field Programmable Gate Array）上將消耗龐大硬體資源，限制了其實際應用。 本論文提出一種硬體最佳化的 GRDPWM 設計方法，僅透過加減運算與查找表（Lookup Table, LUT）即可生成 GRDPWM 波形，大幅降低 FPGA 的資源消耗。 另一方面，過去 GRDPWM 多著重於高頻寬射頻（RF）系統與高效率 PA 的應用；本論文則首次探討其在音訊領域與 Class D PA 中的特性。音訊訊號由電腦經 USB Audio Bridge 晶片轉換為 I²S 協定後輸入 FPGA，並在 FPGA 內進行上取樣（Upsampling）、有限脈衝響應濾波（Finite Impulse Response, FIR Filter）、GRDPWM 以及 Σ-Δ 調變（Sigma Delta Modulation, SDM），再輸出至 PA，以驗證 GRDPWM 作為音訊放大器驅動訊號的可行性與成效。

Conventional digital pulse-width modulation (PWM) applied in power amplifiers (PAs) often suffers from Gibbs phenomenon and aliasing effects, which introduce time-domain ripples and consequently lead to nonlinear distortion, reduced output efficiency, and degraded audio quality. To address this issue, the Gibbs-Phenomenon-Reduced Digital PWM (GRDPWM) algorithm employs partial Fourier series and filter design to effectively suppress time-domain ripples, thereby making the pulse signal more resilient to distortions caused by nonlinear PAs. However, the conventional realization of GRDPWM relies heavily on trigonometric and multiplication operations, which consume substantial hardware resources on field-programmable gate arrays (FPGAs) and thus limit its practical deployment.

This thesis proposes a hardware-optimized GRDPWM design that generates GRDPWM waveforms using only additions, subtractions, and lookup tables (LUTs), significantly reducing FPGA resource utilization.

Furthermore, while prior GRDPWM studies have primarily focused on wideband RF systems and ultra-high-efficiency PAs, this work is the first to investigate its characteristics in the audio domain and Class D PA applications. In the proposed system, audio signals are output from a computer through a USB Audio Bridge chip in I²S format, received by the FPGA, and subsequently processed with upsampling, finite impulse response (FIR) filtering, GRDPWM, and sigma-delta modulation (SDM). The resulting signal is then delivered to the PA to experimentally evaluate the effectiveness of GRDPWM as a driving signal for audio amplification.