請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48171
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平(Chung-Ping Chen) | |
dc.contributor.author | Shih-Chi Yang | en |
dc.contributor.author | 楊士頎 | zh_TW |
dc.date.accessioned | 2021-06-15T06:47:57Z | - |
dc.date.available | 2015-07-06 | |
dc.date.copyright | 2011-07-06 | |
dc.date.issued | 2011 | |
dc.date.submitted | 2011-05-19 | |
dc.identifier.citation | [1] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, 2nd edition. New Jersey: Prentice Hall, 1997.
[2] B.Razavi, RF Microelectronics. Upper Saddle River, NJ: Prentice Hall, 1998. [3] David M. Pozar, Microwave Engineering. 3rd Edition. WILEY, 2004. [4] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, 2nd edition. New York: Cambridge University Press, 2004. [5] T.W. Kim, B, -K. Kim, and K.-R. Lee, “Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors, ” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 223-229, Jan. 2004. [6] B. Kim, J. Ko, and K. Lee, “A new linearization technique for MOSFET RF amplifier using multiple gated transistors,” IEEE Microw. Guided Wave Lett., vol. 10, no. 9, pp. 371-373, Sep. 2000. [7] V. H. Le, S, -K, Han, J, -S, Lee and S, -G, Lee, “Current-Reused Ultra Low Power, Low Noise LNA+Mixer,” IEEE Microwave and Wireless Components Letters, vol. 19, no. 11, pp. 755-757, Sep. 2009. [8] H.-H. Hsieh and L.-H. Lu, “Design of ultra-low-voltage RF frontends with complementary current-reused architectures,” IEEE Trans. Microwave Theory Tech., vol. 55, no. 7, pp. 1445–1458, July. 2007. [9] T, H, Jin and T, W, Kim, “A 5.5-Mw +9.4-dBm IIP3 1.8-dB NF CMOS LNA Employing Multiple Gated Transistors With Capacitance Desensitization,” IEEE Trans. Microwave Theory Tech., vol. 10, pp. 2529–2536, Oct. 2010. [10] B. Razavi, “Design of Analog CMOS Integrated Circuits,” International Edition, McGraw-Hill, 2001. [11] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-State Circuits, vol. 32, no. 5, pp. 745–759, May 1997. [12] C. –H. Liao and H. –R. Huang, “A 5.7-GHz 0.18-μm CMOS gain-controlled differential LNA with current reuse for WLAN receiver,” IEEE Microwave and Wireless Components Letters, vol. 13, no. 12, pp. 526-528, Sep. 2003. [13] X. Fang and H. Zhang and E. Sánchez-Sinencio, “Noise Reduction and Linearity Improvement Technique for a Differential Cascode LNA,” IEEE J. Solid-State Circuits, vol. 43, no. 3, pp. 588-599, Mar. 2008. [14] D. Im , I. Nam , H.-T. Kim and K. Lee 'A wideband CMOS low noise amplifier employing noise and IM2 distortion cancellation for a digital TV tuner', IEEE J. Solid-State Circuits, vol. 44, pp. 686 2009. [15] Blaakmeer, S.C. and Klumperink, E.A.M. and Leenaerts, D.M.W. and Nauta, B., “Wideband Balun-LNA with Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling,” IEEE J. Solid State Circuits, vol.43, no.6, pp. 1431–1450, Jun. 2008. [16] M. A. Arasu, et. al., “A 2.4-GHz CMOS RF front-end for wireless sensor network applications”, IEEE Radio Frequency Integrated Circuits Symposium, June 2006, PP 11-13. [17] M. Camus et al., “A 5.4 mW 0.07 mm 2.4 GHz front end receiver in 90 nm CMOS for IEEE 802.15.4 WPAN,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp .1327–1383, Jun. 2008. [18] V. H. Le, S. K. Han, J. S. Lee, and S. G Lee, “Current-Reused Ultra Low Power, Low Noise LNA & Mixer,” IEEE Microwave and Wireless Components Letters, vol. 19, Issue 4, April 2009, pp. 206 – 208. [19] A. V. Do, C. C. Boon, M. A. Do, K. S. Yeo, A. Cabuk, “An Energy-Aware CMOS Receiver Front End for Low-Power 2.4-GHz Applications” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 10, pp. 2675–2684, Dec. 2010. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48171 | - |
dc.description.abstract | 本篇論文設計了兩個無線接收前端。為在電路特性與電流消耗間達成平衡,分析並整合多項電路技巧,最後提出一系列創新的電路架構。
在第三章中,結合電流重複利用與多閘級電晶體的概念,提出節省電流同時增加線性度的架構。並將整個接收前端視為一體納入考量設計,最後驗證了其提升線性度技巧在系統中亦能有效工作。 在第四章中,為了進一步改善電路特性,提出整合單端轉雙端與電流重複利用及多閘級電晶體的架構。並進一步分析單端轉雙端架構在本設計中,電流不平衡情況下,對於增益、雜訊指數與線性度的影響與取捨。對於單端轉雙端架構不平衡的輸出,則由結合雙端平衡架構來改善。最後提出一個表現更進一步的接收前端。 | zh_TW |
dc.description.abstract | Recently, with raises of communication system demand, communication speed and production cost turn out to be vital issues. As a result, multi-band operation to enhance the communication efficiency and multi-band combination to lower the production costs are expected. Unfortunately, the development of CMOS circuits has been long impeded by inherent shortcomings such as parasitic components. It is still a challenging task for designers to realize CMOS circuits near the transistor cutoff frequency.
In this thesis, to operate in multi-band in an effective chip area, novel circuit topologies are developed for dual-band operations. In Chapter 3, an inductor-reconfiguration technique is introduced to the dual-band T/R switch, thus the single inductor can be reused in the transmitting and receiving modes. In Chapter 4, by switching the matching circuit, the noise figure of the dual-band LNA can be improved in a small chip area. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T06:47:57Z (GMT). No. of bitstreams: 1 ntu-100-R97943027-1.pdf: 979509 bytes, checksum: 976d3fdbc900fe7107dc8f9e280a188e (MD5) Previous issue date: 2011 | en |
dc.description.tableofcontents | Acknowledgement i
Abstract iii Table of Contents vii List of Figures xi List of Tables xv Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Organization of this Thesis 2 Chapter 2 Basic Concepts 5 2.1 Scattering Parameters 5 2.2 Conversion Gain 8 2.3 Harmonics 9 2.4 Gain Compression 10 2.5 Intermodulation 11 Chapter 3 A 2.4 GHz CMOS Receiver Front-End with Current-Reused and Linearization Techniques 17 3.1 Introduction 17 3.2 Conventional Front-Ends 18 3.3 Proposed Techniques 22 3.4 Proposed Front-End 27 3.4.1 Input Matching Consideration 28 3.4.2 Gain Consideration 29 3.4.3 Linearity Consideration 31 3.4.4 Noise Consideration 35 3.4.5 Output Stage Consideration 37 3.5 Experimental Results 38 3.6 Summary 42 Chapter 4 A 2.4 GHz CMOS Receiver Front-End with Single-to-Differential, Current-Reused and Linearization Techniques 45 4.1 Introduction 46 4.2 Conventional Single-to-Differential Structures 46 4.3 Proposed Techniques 50 4.4 Proposed Front-End 56 4.4.1 Input Matching Consideration 56 4.4.2 Gain Consideration 57 4.4.3 Linearity Consideration 60 4.4.4 Noise Consideration 61 4.4.5 Output Stage Consideration 63 4.5 Experimental Results 64 4.6 Summary 68 Chapter 5 Conclusion 71 References 75 | |
dc.language.iso | en | |
dc.title | 整合多項改善電路表現技巧之2.4GHz接收前端設計 | zh_TW |
dc.title | Design of 2.4GHz Receiver Front-End with Multiple Circuit Performance Enhancement Techniques | en |
dc.type | Thesis | |
dc.date.schoolyear | 99-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 曹恆偉(Hen-Wai Tsao),李泰成(Tai-Cheng Lee),林宗賢(Tsung-Hsien Lin) | |
dc.subject.keyword | 接收前端,電流消耗,線性度,多閘級電晶體,單端轉雙端, | zh_TW |
dc.subject.keyword | front-end,current consumption,linearity,MGTR,single-to-differential, | en |
dc.relation.page | 77 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2011-05-20 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-100-1.pdf 目前未授權公開取用 | 956.55 kB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。